Artigos – Sessões

Cronograma de Apresentações SIM 2024

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SIM 1 – Dia 30/09 (Segunda-Feira)
Best Paper Candidates I (4 papers) Chair: Mateus Grellert
HORÁRIO ID
TÍTULO AUTORES(AS)
13:30 12 A Machine Learning-Based Solution to Accelerate the Intra Mode Decision for the VVC Standard Adson Duarte (UFPel)*; Bruno Zatt (UFPel); Guilherme Correa (UFPel); Daniel Palomino (UFPel)
13:45 16 Placement Refinement Strategies for Security Closure Marcelo F Danigno (FURG)*; Mateus Fogaca (Cadence Design Systems); Rafael Schvittz (FURG); Paulo Butzen (UFRGS)
14:00 32 Memory Access Analysis of the Reconstructed Frames in VVenC Motion Estimation Matheus M Isquierdo (UFPel)*; Felipe Sampaio (IFRS); Bruno Zatt (UFPel); Daniel Palomino (UFPel)
14:15 49 Machine Learning-Based Decision Solution for G-PCC Eduardo de Figueiredo Costa (UFPel)*; Leandro Tavares (UFPel); Guilherme Correa (UFPel); Cristiano Santos (UFPel); Marcelo S Porto (UFPel)

SIM 2 – Dia 01/10 (Terça-Feira)
Analog and mixed-signal (7 papers) Chair: Hamilton Klimach
HORÁRIO ID TÍTULO AUTORES(AS)
10:30 29 Electrical and Physical Design of a 15-pF Load Analog Output Buffer for Intra-Die Signal Sensing Beatriz Estefania Hatschbach Rezende (UNIPAMPA)*; Crístian Müller (UNIPAMPA); Lucas Compassi Severo (ITA); Alessandro Gonçalves Girardi (UNIPAMPA); Paulo Aguirre (UNIPAMPA)
10:45 33 A 103.7-µW 4-bit Rail-to-Rail Flash ADC in 65-nm CMOS Tawan Chrysther dos Santos (UNIPAMPA)*; Alessandro Girardi (UNIPAMPA); Paulo Aguirre (UNIPAMPA)
11:00 38 A Low-Power and Low-Noise Open-Loop 7 MHz Relaxation Oscillator João Frischenbruder Sulzbach (UFRGS)*; Hamilton D Klimach (UFRGS)
11:15 43 Applying Oscillation Based Test Method for Evaluating and Sorting Commercial Integrated Circuits Luis Duarte (UFRGS)*; Tiago Balen (UFRGS); Marcelo Lubaszewski (UFRGS)
11:30 52 A 5-V 125-kHz Third-Order Continuous-Time Sigma-Delta Modulator in 130-nm BCD Technology Renan Dotto Oliveira (UNIPAMPA)*; Tawan Chrysther dos Santos (UNIPAMPA); Matheus B S Carvalho (UNIPAMPA); Cristian Muller (UNIPAMPA); Lucas Compassi Severo (ITA); Alessandro Girardi (UNIPAMPA); Paulo Aguirre (UNIPAMPA)
11:45 59 A Simple 10-bit Incremental Sigma-Delta Modulator for Multi Channel Analog to Digital Conversion Martim Presser (UFSM)*; Felipe de Souza e Silva (UFSM); Cesar Augusto Prior (UFSM); Henrique Friggi Beque (UFSM); Thais Marisco Brollo (UFSM)
12:00 47 Evaluation of the CIC Filter Order in Decimation Filters for Sigma-Delta ADCs Otavio Elias Viana de Freitas (UNIPAMPA)*; Critian Muller (UNIPAMPA)

SIM 3 – Dia 01/10 (Terça-Feira)
Reliability (6 papers) Chair: Rafael Soares
HORÁRIO ID TÍTULO AUTORES(AS)
13:30 13 Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing Eloisa Barros (UFPel ); Morgana Macedo Azevedo da Rosa (UFPel )*; Eduardo Antonio da Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)
13:45 15 Robustness Analysis of Different 2:1 Multiplexer Designs Against Single Event Transient Faults Ana Flávia D Reis (FURG)*; Rafael Schvittz (FURG)
14:00 23 Determining Neutron-based static cross-section of a SRAM-based FPGA in a simplified setup Julia Willow Benvenutti (UFRGS)*; Fernanda Kastensmidt (UFRGS); Lívia Streit (UFRGS); Fábio Benevenuti (UFRGS)
14:15 24 Analyzing the Reliability of a Low-cost RISC-V Synthesized into a SRAM-based FPGA under Fault Injection Eduardo Domingo Marañon Aguilar (UFRGS)*; Eduardo Domingo Marañon Aguilar (UFRGS); Nixon Ortiz (UFRGS); Fabio Benevenuti (UFRGS); Fernanda Lima (UFRGS)
14:30 26 Predicting Soft Error Susceptibility in Integrated Circuits: A Methodology for Cross-Section Estimation Clayton Rodrigues Farias (UFRGS)*; Paulo Butzen (UFRGS); Tiago Balen (UFRGS)
14:45 48 Implementation of Design for Testability Techniques in a Low-Power RISC-V Processor Eduardo A Barcelos (UnB)*; Gilmar Beserra (UnB); Jones Silva (UnB); Hercules Santos (UnB)

SIM 4 – Dia 01/10 (Terça-Feira)
Best Paper Candidates II (4 papers) Chair: Mateus Grellert
HORÁRIO ID TÍTULO AUTORES(AS)
15:00 1 New Energy-Efficient 3-2 and 4-2 Approximate Adder Compressors Topologies Leonardo Antonietti (UFPel ); Rodrigo Lopes (UFPel ); Morgana Macedo Azevedo da Rosa (UFPel )*; Eduardo Antonio da Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)
15:15 14 An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units Morgana Macedo Azevedo da Rosa (UFPel )*; Eduardo Antonio da Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)
15:30 20 Statistical Analysis of VVC Residual and Entropy Coding aiming Efficient Hardware Design GABRIEL BITENCOURT CARDOSO (Unipampa)*; Daniel Tomm (Unipampa); Jiovana Gomes (UFRGS); Rodrigo Wuerdig (UFRGS); Sergio Bampi (UFRGS); Fábio Ramos (Unipampa)
15:45 45 Performance Analysis of Multiple Transform Selection in the VVC Encoder Caroline S Camargo (UFPel)*; Bianca Silveira (UFPel); Guilherme Correa (UFPel)

SIM 5 – Dia 02/10 (Quarta-Feira)
Radiofrequency (7 papers) Chair: Sandro Binsfeld Ferreira
HORÁRIO ID TÍTULO AUTORES(AS)
10:30 17 Energy Harvesting applied to Smart Farms João Pedro G Dytz (FURG)*; Vagner Rosa (FURG); Vinicius Pedro (FURG); Paulo Butzen (UFRGS)
10:45 28 Memory Polynomials with Sparse Delays and Nonlinearities Applied to Power Amplifier Mathematical Modeling Maria Eduarda Rizo (UFPR)*; Eduardo Lima (UFPR)
11:00 30 Comparison of 4-transistor and 5-transistor stacked RF CMOS power amplifier MOISES ALVES GUERGOLET (UFPR)*; Favero Santos (SENAI); Bernardo Leite (UFPR)
11:15 37 Adaptively-biased RF CMOS Power Amplifier Luciano A Oliveira (UFPR)*; Bernardo Leite (UFPR)
11:30 39 Characterization of a VLC Circuit Based on Photovoltaic Cells for Indoor Positioning System Vitória Alves Monteiro (UNIPAMPA)*; Tawan Chrysther dos Santos (UNIPAMPA); Cristian Muller (UNIPAMPA); Paulo Aguirre (UNIPAMPA); Alessandro Girardi (UNIPAMPA)
11:45 57 Analysis of a Cold Start Circuit for Indoor Energy Harvesting in 65-nm CMOS Diego Maran de Mattos (UNIPAMPA)*; Paulo Aguirre (UNIPAMPA); Lucas Severo (ITA); Alessandro Girardi (UNIPAMPA)
12:00 58 A 13.56 MHz CMOS Active Rectifier With Dynamically Controllable Comparator for WPT-Powered IMDs Claudio Ernani da Costa Pedroso Júnior (UNIPAMPA)*; Alessandro Girardi (UNIPAMPA); Paulo Aguirre (UNIPAMPA)

 


SIM 6 – Dia 02/10 (Quarta-Feira)
Energy-efficient Design (7 papers) Chair: Talita Borges
HORÁRIO ID TÍTULO AUTORES(AS)
13:30 2 An Ultra Low-Energy VLSI Approximate Discrete Haar Wavelet Transform for ECG Data Compression Eloisa Barros (UFPel ); Morgana Macedo Azevedo da Rosa (UFPel )*; Eduardo Antonio da Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)
13:45 7 Exploring Ultra Compact 4:2 Compressors on Power-efficient Multipliers Vinicius Zanandrea (UFSC)*; Cristina Meinhardt (UFSC)
14:00 10 Approximate Storage Evaluation at Inter-Frame Prediction in VVC Encoding Process Yasmin S Camargo (UFPel)*; Felipe Sampaio (IFRS); Daniel Palomino (UFPel); Bruno Zatt (UFPel); Renira Soares (UFPel); Matheus M. Isquierdo (UFPel)
14:15 25 Bit-Depth Optimized Transposition Buffer Design for the AV1 2D-DCT Transform Jelson Stoelben Rodrigues (UFPel)*; Jones W. Goebel (UFPel); Luciano Volcan Agostini (UFPel – UFPel); Bruno Zatt (UFPel); Marcelo S Porto (UFPel)
14:30 42 An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing Nicolas de Oliveira (UFPel); Morgana Macedo Azevedo da Rosa (UFPel )*; Henrique Seidel (UFPel); Eduardo Antonio da Costa (UCPel); Sergio Almeida ( UCPel); Rafael Soares (UFPel)
14:45 56 Reconfigurable Approximate Multiplier by Multiple Leading One-Bit Blocks João M Bedin (UFRGS)*; Pedro T. L. Pereira (UFRGS), Rodrigo N. Wuerdig (UFRGS), and Sergio Bampi (UFRGS)
15:00 61 Hardware Acceleration for Approximate Version of SATD with Rectangular Hadamard Matrix Sizes Juliana Rodrigues de Vargas (UFRGS)*; Claudio M Diniz (UFRGS)

 


SIM 7 – Dia 02/10 (Quarta-Feira)
Neural Networks and Machine Learning (6 papers) Chair: Julio Leão
HORÁRIO ID TÍTULO AUTORES(AS)
15:15 3 Test Zone Search Optimization in VVC Inter-Frame Prediction Using Machine Learning Ramiro G S Viana (UFPel)*; Fernando Sagrilo (IFFar); Rafael Ferreira (UFPel); Marta B Loose (UFPel ); Marcelo S Porto (UFPel); Guilherme Correa (UFPel); Luciano Volcan Agostini (UFPel)
15:30 6 Fast ISP Mode Decision Solution for the VVC Intra Prediction based on Machine Learning Larissa Araújo (UFPel)*; Adson Duarte (UFPel); Bruno Zatt (UFPel); Guilherme Correa (UFPel); Daniel Palomino (UFPel)
15:45 11 Video Quality Enhancement Based on Multi-Domain Spatio-Temporal Deformable Fusion Model Garibaldi da Silveira Júnior (UFPel)*; Gilberto Kreisler (UFPel); Bruno Zatt (UFPel); Daniel Palomino (UFPel); Guilherme Correa (UFPel)
16:00 31 MAC Convolutional 2D Generic filter Talita A Borges (UFRGS)*; Paulo Butzen (UFRGS); Claudio M Diniz (UFRGS); Leonardo B Soares (IFRS)
16:15 50 Quality-Complexity Analysis of Autoencoders for Neural-Network Image Compression Vitor A Arguilar (UFRGS)*; Leonardo Augusto (UFRGS); Mateus Grellert (UFRGS)
16:30 51 Design and Synthesis of Accelerators for Neural Networks with an I2C Interface: a Preliminary Study TIAGO VIER PRETO (UFRGS)*; Mateus Grellert (UFRGS)

 


SIM 8 – Dia 03/10 (Quinta-Feira)
Visual Signal Processing I ( 7 papers) Chair: Roger Porto
HORÁRIO ID TÍTULO AUTORES(AS)
08:30 21 Coding Efficiency and Time Evaluation of Apple A15 Bionic Chipset HEVC Encoder Vítor Costa (UFPel)*; Murilo Perleberg (UFPel); Luciano Volcan Agostini (UFPel); Marcelo S Porto (UFPel)
08:45 22 4K UHD@60fps Design For The VVC Affine Motion Estimation Reconstructor Marcello M Muñoz (UFPel)*; Murilo Perleberg (UFPel); Luciano Volcan Agostini (UFPel ); Guilherme Correa (UFPel); Marcelo S Porto (UFPel)
09:00 27 An UHD 4K@120fps Hardware for the VVC Prediction Refinement with Optical Flow Murilo Perleberg (UFPel)*; Marcello M Muñoz (UFPel); Denis Maass (UFPel); Vladimir Afonso (IFSul); Luciano Volcan Agostini (UFPel); Marcelo S Porto (UFPel)
09:15 34 Evaluation of AV1 encoder tools for pixel interpolation in fractional inter-frame prediction Daiane Fonseca Freitas (UFPel)*; Patrick Rosa (UFPel); Leonardo Müller ( UFPel); Cláudio Diniz (UFRGS); Mateus Grellert (UFRGS); Guilherme Correa (UFPel)
09:30 35 A Hardware-Friendly Acceleration of VVC Affine Motion Estimation Using Decision Trees Ramiro G S Viana (UFPel)*; Marta B Loose (UFPel ); Rafael Ferreira (UFPel); Marcelo S Porto (UFPel); Guilherme Correa (UFPel); Luciano Volcan Agostini (UFPel)
09:45 46 High-Throughput Hardware Design for Linear Equation System Solving of VVC Affine Prediction Denis Maass (UFPel)*; Marcello M Muñoz (UFPel); Murilo Perleberg (UFPel); Luciano Volcan Agostini (UFPel – UFPel); Marcelo S Porto (UFPel)
10:00 5 Improving the AV1 Global Warped Motion Compensation Execution Time WILLIAM KOLODZIEJSKI (UFPEL)*; Robson Domanski (UFPel); Luciano Volcan Agostini (UFPel – UFPel)

 


SIM 9 – Dia 03/10 (Quinta-Feira)
Visual Signal Processing II (6 papers) Chair: Marcel Corrêa
HORÁRIO ID TÍTULO AUTORES(AS)
10:45 9 Computational Effort Reduction of VVC Inter-Frame Prediction: A Literature Review Marta B Loose (UFPel )*; Ramiro G S Viana (UFPel – UFPel); Bianca Nunes Coelho (UFPEL); Guilherme Correa (UFPel); Luciano Volcan Agostini (UFPel – UFPel)
11:00 18 Mapping and monitoring Normalized Difference Vegetation Index (NDVI) in pasture areas Victório Mariani (UFRGS )*; Altamiro Susin (UFRGS); Tiago Weber (UFRGS)
11:15 19 Survey of Complexity-Aware Artificial Intelligence-based Solutions for Versatile Video Coding Ruhan Avila da Conceição (UFPel)*; Marcelo S Porto (UFPel); Luciano Volcan Agostini (UFPel)
11:30 36 Data Acquisition and Processing Systems for Spectrophotometric Applications: A Review Michael dos Santos Rodrigues (UFRGS)*; Altamiro Amadeu Susin (UFRGS); Prof◦. Dr◦. Alexsandro Cristovão Bonatto (IFRS)
11:45 40 Performance Analysis of Hardware-Accelerated HEVC Encoders Sara Henssler (IFSul); Marcio Spenst (IFSul); Luciano Volcan Agostini (UFPel – UFPel); Marcel Correa (IFSul)*
12:00 54 A Parallel JPEG Pleno Baseline Block-Based Profile Light Field Encoder using OpenMP Ismael Seidel (UFSC)*; André Filipe da Silva Fernandes (UFSC); José Luis Guntzel (UFSC)

 


SIM 10 – Dia 03/10 (Quinta-Feira)
EDA and Other Tools ( 4 papers) Chair: Alcides Costa
HORÁRIO ID TÍTULO AUTORES(AS)
13:45 4 Efficiency and Computational Cost Analysis of the Geometry-based Point Cloud Encoder Gustavo H Rehbein (UFPel)*; Eduardo de Figueiredo Costa (UFPel); Leandro Tavares (UFPel); Cristiano Santos (UFPel); Guilherme Correa (UFPel); Marcelo S Porto (UFPel)
14:00 8 Evaluation of LBP Learning for U-Net Based Road Semantic Segmentation Mauricio K Yui (UEL)*;Leonimer Flávio de Melo (UEL)*
14:15 44 Enabling Programmable Data Planes with C++ and High-Level Synthesis for Custom Packet Forwarding Nathan A Guimarães (UFRGS)*; Pablo Rodrigues (UFRGS); Weverton Cordeiro (UFRGS); Jose Rodrigo Azambuja (UFRGS)
14:30 55 Abstracting Logic Synthesis Features with Node Centrality for Routing Congestion Prediction Augusto Berndt (UFSC)*; Cristina Meinhardt (UFSC)