Artigos – Sessões

SESSÃO I – Dia 31/05 (Quarta-Feira)
08:30 Comparison of Ring Oscillator Topologies Using CMOS Inverters and Differential Pair Amplifiers as Delay Cells Felipe Z Righi (UNIPAMPA); Vinícius Guimarães (UNIPAMPA); Lucas Severo (UNIPAMPA)
08:45 Selective Method with Adapted Activation Function and Applied in Non-linear Optimization for Modeling of Power Amplifiers Ana Paula Princival Machado (UFPR); Eduardo Lima (UFPR)
09:00 Behavioral Modeling Using Volterra Series with Imposition of Small Signals in One Input Daniele Richartz (UFPR); Eduardo Lima (UFPR); Ana Pelegrini (UFPR)
09:15 Product between multi-layer perceptron and finite impulse response filter applied to behavioral modeling of power amplifiers Matheus Henrique Silveira Santana (UFPR); Eduardo Gonçalves de Lima (UFPR)
09:30 Comparison Between Least Squares and Nonlinear Optimization in Obtaining Coefficients from the Product of Two Volterra Series Lucas V D Santos (UFPR); Eduardo Lima (UFPR)
09:45 Comparative Analysis of RF Passive Impedance Matching Networks on Low-Cost FR4 Substrate Gustavo H Flach (UFPR); Ivan Adam (UFPR); André Mariano (UFPR)

SESSÃO II – Dia 31/05 (Quarta-Feira)
10:30 EMG Capture Board Project with Microcontroller Shipped for Use in Myoelectric Prosthesis Higor Stachin (UTFPR); Linnyer Ruiz (UEM); André Luiz R. Monteiro (UTFPR); Rodrigo Hübner (UTFPR)
10:45 New Modified 4:2 Approximate Compressors for Low-power Applications Vinicius Zanandrea (UFSC); Cristina Meinhardt (UFSC)
11:00 Evaluating the JART Memristor Model in different Logic Styles Helisa s de Lima (UFRGS); Cesar Dias (UFRGS); Raphael Brum (UFRGS); Paulo Butzen (UFRGS)
11:15 The influence of Random Telegraph Noise on Ion and Ioff currents and a proof of their Chaotic Nature Elias de Almeida Ramos (UFRGS); Ricardo Reis (UFRGS)
11:30 A Minimal Physical Implementation of the PicoSoC Rodrigo Wuerdig (UFRGS); Leonardo H. Brendler (UFRGS); Claudio M Diniz (UFRGS); Ricardo Reis (UFRGS); Sergio Bampi (UFRGS)
11:45 Building a Remote Monitoring System with Resource-Constrained Microprocessors Enzo V Zucchetti Pietta (UFRGS); Lucas Dal Castel (UFRGS); José Rodrigo Azambuja (UFRGS)
12:00 Reliability in Approximate Circuits Matheus F Pontes (UFPel); João Júnior da Silva Machado (IFSul); Leomar Rosa Jr (UFPel); Paulo Butzen (UFRGS)

SESSÃO III – Dia 01/06 (Quinta-Feira)
08:30 A Low Noise Signal Conditioning Circuit for Analog MEMS Accelerometers Marcelo Romanssini (UNIPAMPA); Lucas Severo (UNIPAMPA); Paulo Aguirre (UNIPAMPA); Alessandro Girardi (UNIPAMPA)
08:45 Offset Compensation Techniques for a Multi-Stage Comparator Beatriz Estefania Hatschbach Rezende (UNIPAMPA); João Lucas Johan Brum (UNIPAMPA); Martina Correa Rodrigues (UNIPAMPA; Chipus Microelectronics); Lucas Compassi Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA); William Prodanov (Chipus Microelectronics); Paulo Cesar Comassetto de Aguirre (UNIPAMPA)
09:00 Comparative Analysis of MOSFET Current Mirrors Vinícius Betim Guimarães (UNIPAMPA); Felipe Righi (UNIPAMPA); Lucas Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA)
09:15 PV Cell for Indoor VLC: Measurement and Characterization Vitória Monteiro (UNIPAMPA); Diego Maran de Mattos (UNIPAMPA); Paulo Aguirre (UNIPAMPA); Lucas Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA)
09:30 Design of a Low-Voltage 3-Bit Rail-to-Rail Flash ADC for GNSS Application Ramon H. Vieira (UNIPAMPA); Tawan Chrysther dos Santos (UNIPAMPA); Renan Dotto Pacheco de Oliveira (UNIPAMPA); Martina C. Rodrigues (UNIPAMPA); Alessandro Girardi (UNIPAMPA); Lucas C. Severo (UNIPAMPA); Paulo César C. de Aguirre (UNIPAMPA)
12:00 Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing Morgana Macedo Azevedo da Rosa (UFPel ); Eduardo Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)

SESSÃO IV – Dia 01/06 (Quinta-Feira)
10:30 Predicting Routing Congestion During Logic Synthesis With Graph Neural Networks Augusto Berndt (UFSC); Cristina Meinhardt (UFSC)
10:45 Exploring Selective Gate Hardening to Improve Circuit Reliability João Júnior da Silva Machado (IFSul); Matheus F Pontes (UFPel); Marcio Oliveira da Rocha (IFSul); Denis Teixeira Franco (UFPel); Leomar Soares da Rosa Junior (UFPel); Paulo Francisco Butzen (UFRGS)
11:00 ATMR design by construction based on two-level ALS Gabriel Ammes (UFRGS); Guilherme Manske (UFRGS); Paulo Butzen (UFRGS); André Reis (UFRGS); Renato Ribas (UFRGS)
11:15 Intracell Routing for Automatic Cell Generation Using an SMT Solver Vitor Hugo Fuerstenau Maciel (UFRGS); José Eduardo Thums (UFRGS); Ricardo Reis (UFRGS)
11:30 Susceptibility analysis of different XOR designs against Single Event Transient Faults Ana Flávia D Reis (FURG); Ingrid Oliveira (UFPEL); Rafael Schvittz (FURG)
11:45 Comparative analysis of XOR logic considering different designs against Single Event Transient faults Vinicios C Costa (FURG); Ingrid Oliveira (UFPel); Rafael Schvittz (FURG)
12:00 Usage of Formal Sequential Equivalence Checking to verify late changes on RTL projects Mônica K Pereira (Cadence Design Systems); Luiza Pena (Cadence Design Systems); Ricardo Duarte (UFMG)

SESSÃO V – Dia 02/06 (Sexta-Feira)
08:30 Study and Comparison of Image Processing Methods for Vehicle License Plate Recognition Henrique Fragoso (IFC); Marcelo A Soares (IFC); Fabio Terra (; Jean Dalcin (IFC); Regina Marin (IFC)
08:45 Exploitation of Approximation Storage at VVC Inter-Frame Prediction Memories Yasmin S Camargo (UFPel); Felipe Sampaio (IFRS); Daniel Palomino (UFPel); Bruno Zatt (UFPel)
09:00 Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder Bruna R Garcia (UFPel); Bianca Silveira (UFPel); Claudio M Diniz (UFRGS); Daniel Palomino (UFPel); Guilherme Correa (UFPel)
09:15 USING DECISION TREES TO SAVE ENERGY IN H.266-TO-AV1 VIDEO TRANSCODING Caroline S Camargo (UFPel); Alex Borges (UFPel); Guilherme Correa (UFPel)
09:30 Improving Video Coding Efficiency Through Frame Elimination and VFI Reconstruction André Beims Bräscher (UFSC); Gabriela Furtado da Silveira (UFSC); Luiz Henrique Cancellier (UFSC); Ismael Seidel (UFSC); Mateus Grellert (UFRGS); José Luís Almada Güntzel (UFSC)
09:45 Area and Energy Evaluation of an FME Hardware Architecture for HEVC and VVC Encoders Nicole Citadin (UFSC); Vanio Rodrigues Filho (UFSC); Ismael Seidel (UFSC); Marcio Monteiro (UFSC); Mateus Grellert (UFRGS); José Güntzel (UFSC)


SESSÃO VI – Dia 02/06 (Sexta-Feira)
11:15 Rate-Distortion and Complexity Analysis of Fast Video Encoders Eduardo F Lodi (UFSC); Arthur S Rodrigues (UFSC); Ismael Seidel (UFSC); Guilherme Correa (UFPel); Mateus Grellert (UFRGS)
11:30 A Power-efficient Kernel Configurable Gaussian Filter Architecture Marcio Monteiro (UFSC); Ismael Seidel (UFSC); José Güntzel (UFSC); Mateus Grellert (UFRGS); Leonardo B Soares (IFRS); Cristina Meinhardt (UFSC)
11:45 Energy and Computing Assessment of Video Processing Kernels on CPU and FPGA platforms João G Firta Foes (UFSC); Fillipi Mangrich (UFSC); Ismael Seidel (UFSC); Mateus Grellert (UFRGS);
12:00 AxRSU: Approximate Radix-4 Squarer Unit Morgana Macedo Azevedo da Rosa (UFPel ); Guilherme Paim (UFRGS); Jorge Castro (Instituto Tecnologico de Costa Rica – TEC); Eduardo Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)