This page presents a list with my main publications. My curriculum vitae (in Portuguese) presents the complete list of my published works.

Published Thesis (in Portuguese):

AGOSTINI, Luciano. Desenvolvimento de Arquiteturas de Alto Desempenho Dedicadas à Compressão de Vídeo Segundo o Padrão H.264/AVC. 2007. Tese (Doutorado em Computação) – Universidade Federal do Rio Grande do Sul. Orientador: Sergio Bampi.

AGOSTINI, Luciano. Projeto de Arquiteturas Integradas para a Compressão de Imagens JPEG. 2002. Dissertação (Mestrado em Computação) – Universidade Federal do Rio Grande do Sul. Orientador: Sergio Bampi.

Published Books:

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Complexity-Aware High Efficiency Video Coding. 1. ed. Berlin: Springer International Publishing, 2016. v. 1. 225p.

Published Books Chapters:

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Computational Resource Management for Video Coding in Mobile Environments. In: Constandinos X. Mavromoustakis; Evangelos Pallis; George Mastorakis. (Org.). Modeling and Optimization in Science and Technologies. 1ed.Berlin: Springer International Publishing, 2014, v. 3, p. 515-549.

Published Journal Articles:

SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. Block-level fast coding scheme for depth maps in three-dimensional high efficiency video coding. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-4, 2018.

SANCHEZ, G. ; MARCON, CESAR ; AGOSTINI, L. V. . Exploration of depth modeling mode one lossless wedgelets storage strategies for 3D-high efficiency video coding. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-12, 2018.

SANCHEZ, G. ; AGOSTINI, L. V. ; MARCON, CÉSAR . A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 54, p. 193-203, 2018.

AFONSO, V.; CONCEICAO, R.; SALDANHA, M.; BRAATZ, LUCIANO; PERLEBERG, M.; CORRÊA, G.; PORTO, MARCELO; AGOSTINI, L. V.; ZATT, Bruno; SUSIN, A. Energy-Aware Motion and Disparity Estimation System for 3D-HEVC with Run-Time Adaptive Memory Hierarchy. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 99, p. 1-10, 2018.

SILVEIRA, DIEISON; ZATT, Bruno; AGOSTINI, L.; PORTO, Marcelo. Reference frame context-adaptive variable-length coder: a real-time hardware-friendly approach for lossless external memory bandwidth reduction in current video-coding systems. Journal of Real-Time Image Processing, v. 14, p. 249-265, 2018.

SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Real-time scalable hardware architecture for 3D-HEVC bipartition modes. Journal of Real-Time Image Processing, v. 13, p. 71-83, 2017.

SALDANHA, MÁRIO ; SANCHEZ, GUSTAVO ; ZATT, Bruno ; PORTO, Marcelo ; Agostini, Luciano . Energy-aware scheme for the 3D-HEVC depth maps prediction. Journal of Real-Time Image Processing, v. 13, p. 55-69, 2017.

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Pareto-Based Method for High Efficiency Video Coding with Limited Encoding Time. IEEE Transactions on Circuits and Systems for Video Technology, v. 26, p. 1734-1745, 2016.

SALDANHA, M.; SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. Energy-aware scheme for the 3D-HEVC depth maps prediction. Journal of Real-Time Image Processing, p. 1-15, 2016.

SILVA, T.; AGOSTINI, L.; CRUZ, L. Fast intra prediction algorithm based on texture analysis for 3D-HEVC encoders. Journal of Real-Time Image Processing, v. 12, p. 357-368, 2016.

CORREA, G.; AGOSTINI, L.; ASSUNCAO, P.; CRUZ, L. Complexity scalability for real-time HEVC encoders. Journal of Real-Time Image Processing, v. 12, p. 107-122, 2016.

SANCHEZ, G.; JORDANI, L.; MARCON, C.; AGOSTINI, L. V. DFPS: A Fast Pattern Selector for Depth Modeling Mode 1 in Three-Dimensional High-Efficiency Video Coding Standard. Journal of Electronic Imaging (Print), v. 25, p. 063011, 2016.

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Fast coding tree structure decision for HEVC based on classification trees. Analog Integrated Circuits and Signal Processing, v. 1, p. 1-11, 2016.

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Fast HEVC Encoding Decisions Using Data Mining. IEEE Transactions on Circuits and Systems for Video Technology, v. 25, p. 660-673, 2015.

SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design. Journal of Real-Time Image Processing, v. sv, p. 1-21, 2015.

SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. Hardware-friendly HEVC motion estimation: new algorithms and efficient VLSI designs targeting high definition videos. Analog Integrated Circuits and Signal Processing, v. 82, p. 135-146, 2014.

AGOSTINI, L.; PORTO, M.; CRISTANI, C.; OGLIO, P.; SILVA, M.; MATOS, J.; BAMPI, S. Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos. Multimedia Tools and Applications, v. 63, p. 107-127, 2013.

CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. Performance and Computational Complexity Assessment of High-Efficiency Video Encoders. IEEE Transactions on Circuits and Systems for Video Technology (Print), v. 22, p. 1899-1909, 2012.

CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. Complexity control of high efficiency video encoders for power-constrained devices. IEEE Transactions on Consumer Electronics, v. 57, p. 1866-1874, 2011.

AGOSTINI, L.; SILVA, I.; BAMPI, S. Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs. Microprocessors and Microsystems, v. 31, p. 487-497, 2007.

AGOSTINI, L.; SILVA, I.; BAMPI, S. Parallel color space converters for JPEG image compression. Microelectronics and Reliability, Inglaterra, v. 44, n.4, p. 697-703, 2004.

 

Published Event Papers:

MARTINS, ANDERSON; PENNY, WAGNER; WEBER, MATHEUS ; AGOSTINI, Luciano; PORTO, Marcelo; PALOMINO, Daniel ; MATTOS, JULIO ; ZATT, Bruno. Configurable Cache Memory Architecture for Low-Energy Motion Estimation. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.

BRAATZ, LUCIANO; ZATT, Bruno; PALOMINO, Daniel; AGOSTINI, Luciano; PORTO, Marcelo. High-Throughput and Low-Power Integrated Direct/Inverse HEVC Quantization Hardware Design. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.

SANCHEZ, GUSTAVO; AGOSTINI, Luciano; MARCON, CESAR. High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.

AFONSO, VLADIMIR; SUSIN, Altamiro; PERLEBERG, MURILO; CONCEICAO, RUHAN; CORREA, Guilherme; AGOSTINI, Luciano; ZATT, Bruno; PORTO, Marcelo. Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.

SEIDEL, ISMAEL; RODRIGUES FILHO, VANIO; AGOSTINI, Luciano; GUNTZEL, JOSE LUIS. Coding- and Energy-Efficient FME Hardware Design. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.

SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. Fast 3D-HEVC Depth Maps Intra-Frame Prediction Using Data Mining. In: ICASSP 2018 – 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. Piscataway: IEEE, 2018. p. 1-5.

GONCALVES, P.; PORTO, MARCELO; ZATT, Bruno; AGOSTINI, L. V.; CORRÊA, G. Octagonal-Axis Raster Pattern for Improved Test Zone Search Motion Estimation. In: ICASSP 2018 – 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. Piscataway: IEEE, 2018. p. 1-5.

SANCHEZ, G.; AGOSTINI, L.; MARCON, C. Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.

CORREA, M.; ZATT, B.; PORTO, M.; AGOSTINI, L. High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.

AFONSO, V.; SUSIN, A.; AUDIBERT, L.; SALDANHA, M.; CONCEICAO, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.

BRAATZ, L.; AGOSTINI, L.; ZATT, B.; PORTO, M. A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.

SANCHEZ, G.; SALDANHA, M.; AGOSTINI, L.; MARCON, C. Depth modeling modes complexity control system for the 3D-HEVC video encoder. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1021-1060.

AVILA, G.; CONCEICAO, R.; BUBOLZ, T.; ZATT, B.; PORTO, M.; AGOSTINI, L.; CORREA, G. Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1031-1070.

SANCHEZ, G.; SALDANHA, M.; ZATT, B.; PORTO, M.; AGOSTINI, L.; MARCON, C. Edge-aware depth motion estimation a complexity reduction scheme for 3D-HEVC. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1524-1573.

PENNY, W.; MACHADO, I.; PORTO, M.; AGOSTINI, L.; ZATT, B. Pareto-based energy control for the HEVC encoder. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 814-819.

STORCH, I.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. Speedup-aware history-based tiling algorithm for the HEVC standard. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 824-829.

CONCEICAO, R.; AVILA, G.; CORREA, G.; PORTO, M.; ZATT, B.; AGOSTINI, L. Complexity reduction for 3D-HEVC depth map coding based on early Skip and early DIS scheme. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 1116-1121.

PAIM, G.; GOEBEL, J.; PENNY, W.; ZATT, B.; PORTO, M.; AGOSTINI, L. High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2162-2167.

PAIM, G.; PENNY, W.; GOEBEL, J.; AFONSO, V.; SUSIN, A.; PORTO, M.; ZATT, B.; AGOSTINI, L. An efficient sub-sample interpolator hardware for VP9-10 standards. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2167-2172.

SEIDEL, I.; CANCELLIER, L.; GUNTZEL, J.; AGOSTINI, L. Rate-constrained successive elimination of Hadamard-based SATDs. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2395-2399.

CORREA, G.; AGOSTINI, L.; CRUZ, L. Fast H.264/AVC to HEVC Transcoder Based on Data Mining and Decision Trees. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 2539-2542.

GOEBEL, J.; PAIM, G.; AGOSTINI, L.; ZATT, B.; PORTO, M. An HEVC Multi-Size DCT Hardware with Constant Throughput and Supporting Heterogeneous CUs. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 2202-2205.

SEIDEL, I.; BRASCHER, A.; GÜNTZEL, J.; AGOSTINI, L. Energy-Efficient SATD for Beyond HEVC. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 802-805.

CORREA, G.; ASSUNCAO, P.; CRUZ, LUIS A.; AGOSTINI, L. Encoding time control system for HEVC based on Rate-Distortion-Complexity analysis. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 1114-1117.

SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A real-time architecture for reference frame compression for high definition video coders. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 842-845.

SALDANHA, M.; SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. Complexity reduction for the 3D-HEVC depth maps coding. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 621-624.

MAICH, H.; PAIM, G.; AFONSO, V.; AGOSTINI, L.; ZATT, B.; PORTO, M. A multi-standard interpolation hardware solution for H.264 and HEVC. In: 2015 IEEE International Conference on Image Processing (ICIP), 2015, Quebec City. p. 2910-2914.

SILVA, T.; AGOSTINI, L.; CRUZ, L. Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction. In: 2015 IEEE International Conference on Multimedia and Expo (ICME), 2015, Turin. p. 1-6.

SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A low-complexity and lossless reference frame encoder algorithm for video coding. In: ICASSP 2014 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2014, Florence. p. 7358-7362.

SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 2624-2627.

CONCEICAO, R.; SOUZA, J.; JESKE, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 1925-1928.

SANCHEZ, G.; SALDANHA, M.; BALOTA, GABRIEL ; ZATT, B.; PORTO, M.; AGOSTINI, L. Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 3209-3213.

SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 5641-5645.

SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; BAMPI, S.; HENKEL, J. Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding. In: Design Automation and Test in Europe, 2013, Grenoble. New Jersey: IEEE Conference Publications. p. 665-670.

SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; HENKEL, J.; BAMPI, S. Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1831-1835.

GRELLERT, M.; SHAFIQUE, M.; KHAN, M.; AGOSTINI, L.; MATTOS, J.; HENKEL, J. An adaptive workload management scheme for HEVC encoding. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1850-1854.

SANCHEZ, G.; PORTO, M.; AGOSTINI, L. A hardware friendly motion estimation algorithm for the emergent HEVC standard and its low power hardware design. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1991-1994.

SILVEIRA, D.; PORTO, M.; AGOSTINI, L. A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture. In: ICME 2013 – IEEE International Conference on Multimedia and Expo, 2013, San Jose. Piscatway: IEEE, 2013. p. 1-6.

SANCHEZ, G.; AGOSTINI, L.; SAMPAIO, F.; PORTO, M.; BAMPI, S. Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design. In: ICME 2012 – IEEE International Conference on Multimedia & Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 1079-1084.

SAMPAIO, F.; BAMPI, S.; SILVA, M.; AGOSTINI, L.; MATOS, J. Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter‐Prediction of HEVC Encoders. In: ICME 2012 – IEEE International Conference on Multimedia & Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 657-662.

CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Motion compensated tree depth limitation for complexity control of HEVC encoding. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 217-220.

PALOMINO, D.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; SUSIN, A. A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 201-204.

VIANNA, H.; SANCHEZ, G.; PORTO, M.; AGOSTINI, L. High performance hardware architectures for the inverse Rotational Transform of the emerging HEVC standard. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 189-192.

SILVA, M.; SAMPAIO, F.; MATOS, J.; AGOSTINI, L. A Multilevel Data Reuse Scheme for Motion Estimation and Its VLSI Design. In: ISCAS 2011 – IEEE International Symposium on Circuits and Systems, 2011, Rio de Janeiro. New York: IEEE, 2011. p. 583-586.

ZATT, B.; MUHAMMAD, S.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; HENKEL, J. Run-Time Adaptive Energy-Aware Motion and Disparity Estimation in Multiview Video Coding. In: DAC2011 – 48th Design Automation Conference, 2011, San Diego. Piscataway: IEEE, 2011. p. 1026-1031.

CORRÊA, G.; PALOMINO, D.; DINIZ, C.; AGOSTINI, L.; BAMPI, S. SHBS: A Heuristic for Fast Inter Mode Decision of H.264/AVC Standard Targeting VLSI Design. In: ICME 2011 – IEEE International Conference on Multimedia & Expo, 2011, Barcelona. Piscataway: IEEE, 2011. p. 1-4.

DINIZ, C.; ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. A Real Time H.264/AVC Intra Frame Prediction Hardware Architecture for HDTV 1080P Videos. In: 2009 IEEE International Conference on Multimedia and Expo, 2009, New York. Piscataway: IEEE, 2009. p. 1138-1141.

PALOMINO, D.; SAMPAIO, F.; DORNELLES, R.; AGOSTINI, L. Low Latency and High Throughput Dedicated Loop of Transforms and Quantization Focusing in the H.264/AVC Intra Prediction. In: IEEE ICIP 2009 – IEEE International Conference on Image Processing, 2009, Cairo. Piscataway: IEEE, 2009. p. 2697-2700.

PORTO, M. ; AGOSTINI, L.; BAMPI, S.; SUSIN, A. A High Throughput and Low Cost Diamond Search Architecture for HDTV Motion Estimation. In: ICME2008 – IEEE International Conference on Multimedia & Expo, 2008, Hannover. Piscataway: IEEE, 2008. p. 1033-1036.

ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. HP422-MoCHA: A H.264/AVC High Profile Motion Compensation Architecture for HDTV. In: ISCAS2008 – 2008 IEEE International Symposium on Circuits and Systems, 2008, Seattle. Piscataway: IEEE, 2008. p. 25-28.

AZEVEDO, A.; ZATT, B.; AGOSTINI, L.; BAMPI, S. MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. In: ISCAS 2007 – IEEE International Symposium on Circuits and Systems, 2007, New Orleans. Piscataway: IEEE, 2007. p. 1617-1620.

AGOSTINI, L.; PORTO, R.; GÜNTZEL, J.; SILVA, I.; BAMPI, S. High Throughput Multitransform and Multiparallelism IP for the H.264/AVC Video Compression Standard. In: ISCAS 2006 – IEEE International Symposium on Circuits and Systems, 2006, Ilha de Kos. Piscataway: IEEE, 2006. p. 5417-5422.

AGOSTINI, L.; AZEVEDO, A.; ROSA, V.; BERRIEL, E.; SANTOS, T.; BAMPI, S.; SUSIN, A. FPGA Design of a H.264/AVC Main Profile Decoder for HDTV. In: FPL 2006 – 16th IEEE International Conference on Field Programmable Logic and Applications, 2006, Madri. Piscataway: IEEE, 2006. p. 501-506.