*** Updated May 6, 2024 ***

This page presents a list with my main publications. My curriculum vitae (in Portuguese) presents the complete list of my published works.

Published Thesis (in Portuguese):

• AGOSTINI, Luciano. Design of High-Performance Architectures for the H.264/AVC Video Compression Standard (in Portuguese). 2007. Thesis (Doctorate in Computing) – Universidade Federal do Rio Grande do Sul. Advisor: Sergio Bampi.
• AGOSTINI, Luciano. Design of Integrated Architectures for the JPEG Image Compression (in Portuguese). 2002. Dissertation (Master in Computing) – Universidade Federal do Rio Grande do Sul. Advisor: Sergio Bampi.

Published Books:

• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Versatile Video Coding (VVC) – Machine Learning and Heuristics. 1. ed. Springer Nature, 2022. v. 1. 123p. 
• SANCHEZ, G.; AGOSTINI, L.; MARCON, C. Algorithms for Efficient and Fast 3D-HEVC Depth Map Encoding. 1. ed. Cham: Springer International Publishing, 2020. 83p.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Complexity-Aware High Efficiency Video Coding. 1. ed. Berlin: Springer International Publishing, 2016. v. 1. 225p.

Published Books Chapters:

• AFONSO, V.; SALDANHA, M.; CONCEICAO, R.; PERLEBERG, M.; PORTO, M.; ZATT, B.; SUSIN, A.; AGOSTINI, L. Real-time architectures for 3D video coding. In: Maurizio Martina. (Org.). VLSI Architectures for Future Video Coding. 1ed.: Institution of Engineering and Technology, 2019, v. , p. 191-226.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Computational Resource Management for Video Coding in Mobile Environments. In: Constandinos X. Mavromoustakis; Evangelos Pallis; George Mastorakis. (Org.). Modeling and Optimization in Science and Technologies. 1ed.Berlin: Springer International Publishing, 2014, v. 3, p. 515-549.

Published Journal Articles:

• GOEBEL, J.; AGOSTINI, L.; ZATT, B.; PORTO, M. A High-Throughput Hardware Design for the AV1 Decoder Intraprediction. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 99, p. 1-14, 2023.
• CORRÊA, M.; PALOMINO, D.; CORRÊA, G.; AGOSTINI, L. Heuristic-based Algorithms for Low-Complexity AV1 Intra Prediction. Ieee Design & Test, v. 99, p. 1-1, 2023.
• BENDER, I.; BORGES, A.; AGOSTINI, L.; ZATT, B.; CORREA, G.; PORTO, M. Complexity and compression efficiency analysis of libaom AV1 video codec. Journal of Real-Time Image Processing, v. 20, p. 50, 2023.
• GONCALVES, P.; AGOSTINI, L.; CORRÊA, G.; PORTO, M. Learning-based Bypass Zone Search Algorithm for Fast Motion Estimation. MULTIMEDIA TOOLS AND APPLICATIONS, v. 99, p. 1-15, 2022.
• NETO, L.; CORREA, M.; PALOMINO, D.; AGOSTINI, L.; CORREA, G. Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction. IEEE Design & Test, v. 39, p. 38-45, 2022.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 32, p. 3947-3960, 2022.
• STORCH, I.; AGOSTINI, L.; ZATT, B.; BAMPI, S.; PALOMINO, D. FastInter360: A Fast Inter Mode Decision for HEVC 360 Video Coding. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 32, p. 3235-3249, 2022.
• PERLEBERG, M.; AFONSO, V.; BORGES, V.; ZATT, B.; AGOSTINI, L.; PORTO, M. Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction. Journal of Real-Time Image Processing, v. 19, p. 969-984, 2022.
• PORTO, R.; PERLEBERG, M.; AFONSO, V.; ZATT, B.; ROMA, N.; AGOSTINI, L.; PORTO, M. Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing. Journal of Real-Time Image Processing, v. 18, p. 723-737, 2021.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Performance analysis of VVC intra coding. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 79, p. 103202, 2021.
• CORREA, M.; SALDANHA, M.; BORGES, A.; CORREA, G.; PALOMINO, D.; PORTO, M.; ZATT, B.; AGOSTINI, L. AV1 and VVC Video Codecs: Overview on Complexity Reduction and Hardware Design. IEEE Open Journal of Circuits and Systems, v. 2, p. 564-576, 2021.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard. JOURNAL OF ELECTRONIC IMAGING, v. 30, p. 053009-1-053009-17, 2021.
• SILVEIRA, D.; AMARAL, L.; POVALA, G.; ZATT, B.; AGOSTINI, L.; PORTO, M.; BAMPI, S. Low-energy motion estimation memory system with dynamic management. Journal of Real-Time Image Processing, v. 18, p. 2495-2510, 2021.
• FERNANDES, R.; SANCHEZ, G.; CATALDO, R.; AGOSTINI, L.; MARCON, C. Using curved angular intra-frame prediction to improve video coding efficiency. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 80, p. 103291, 2021.
• BORGES, V.; PERLEBERG, M.; AFONSO, V.; PORTO, M.; AGOSTINI, L. Hardware and coding efficiency assessment of 3D-HEVC DIS tool using alternative similarity criteria. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 108, p. 555-568, 2021.
• SANCHEZ, G.; SALDANHA, M.; FERNANDES, R.; CATALDO, R.; AGOSTINI, L.; MARCON, C. 3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ONLINE), v. 67, p. 415-427, 2020.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Fast 3D-HEVC Depth Map Encoding Using Machine Learning. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 30, p. 850-861, 2020.
• CORREA, M.; WASKOW, B.; GOEBEL, J.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. A High-Throughput Hardware Architecture for AV1 Non-Directional Intra Modes. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 67, p. 1481-1494, 2020.
• PERLEBERG, M.; BORGES, V.; AFONSO, V.; PALOMINO, D.; AGOSTINI, L.; PORTO, M. 6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design. IEEE Transactions on Circuits and Systems II: Express Briefs, v. 67, p. 836-840, 2020.
• SALDANHA, M; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 67, p. 1704-1714, 2020.
• PERLEBERG, M.; SUSIN, A.; AFONSO, V.; AGOSTINI, L.; ZATT, B.; PORTO, M.; CONCEICAO, R. High-Throughput Hardware Design for 3D-HEVC Disparity Estimation. IEEE Design & Test, v. 37, p. 22-29, 2020.
• UCKER, M.; AFONSO, V.; SALDANHA, M.; AUDIBERT, L.; CONCEICAO, R.; SUSIN, A.; PORTO, M.; ZATT, B.; AGOSTINI, L. High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction. IEEE Design & Test, v. 37, p. 7-14, 2020.
• SANCHEZ, G.; FERNANDES, R.; CATALDO, R.; AGOSTINI, L.; SOUSA, L.; MARCON, C. Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction. IEEE Design & Test, v. 37, p. 15-21, 2020.
• SANCHEZ, G.; AGOSTINI, L.; SOUSA, L.; MARCON, C. Parallelism exploration for 3D high-efficiency video coding depth modeling mode one. Journal of Real-Time Image Processing, v. 17, p. 787-797, 2020.
• PORTO, R.; CORREA, M.; GOEBEL, J.; ZATT, B.; ROMA, N.; AGOSTINI, L.; PORTO, M. UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders. Journal of Real-Time Image Processing, v. 17, p. 1685-1701, 2020.
• STORCH, I.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. Speedup evaluation of HEVC parallel video coding using Tiles. Journal of Real-Time Image Processing, v. 17, p. 1469-1486, 2020.
• SALDANHA, M.; CONCEIÇÃO, R.; AFONSO, V.; AVILA, G.; SUSIN, A.; PORTO, M.; ZATT, B.; CORREA, G.; AGOSTINI, L. Complexity and compression efficiency assessment of 3D-HEVC encoder. MULTIMEDIA TOOLS AND APPLICATIONS (DORDRECHT. ONLINE), v. 79, p. 25723-25746, 2020.
• DOMANSKI, R.; GOEBEL, J.; PENNY, W.; PORTO, M.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v. 66, p. 883-887, 2019.
• PENNY, W.; GOEBEL, J.; PAIM, G.; PORTO, M.; AGOSTINI, L.; ZATT, B. High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator. Journal of Real-Time Image Processing, v. 16, p. 175-192, 2019.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design. Journal of Real-Time Image Processing, v. 16, p. 391-411, 2019.
• SEIDEL, I.; MONTEIRO, M.; BONOTTO, B.; AGOSTINI, L.; GUNTZEL, J. Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, v. 66, p. 2102-2115, 2019.
• BUBOLZ, T.; CONCEICAO, R.; GRELLERT, M.; AGOSTINI, L.; ZATT, B.; CORREA, G. Quality and Energy-Aware HEVC Transrating Based on Machine Learning. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, v. 66, p. 2124-2136, 2019.
• SANCHEZ, G.; SILVEIRA, J.; AGOSTINI, L.; MARCON, C. Performance Analysis of Depth Intra-Coding in 3D-HEVC. IEEE Transactions on Circuits and Systems for Video Technology, v. 29, p. 2509-2520, 2019.
• SANCHEZ, G.; SALDANHA, M.; AGOSTINI, L.; MARCON, C. Analysis of parallel encoding using tiles in 3D High Efficiency Video Coding. Signal Image and Video Processing, v. 13, p. 1079-1086, 2019.
• SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. Block-level fast coding scheme for depth maps in three-dimensional high efficiency video coding. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-4, 2018.
• SANCHEZ, G. ; MARCON, CESAR ; AGOSTINI, L. V. . Exploration of depth modeling mode one lossless wedgelets storage strategies for 3D-high efficiency video coding. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-12, 2018.
• SANCHEZ, G. ; AGOSTINI, L. V. ; MARCON, CÉSAR . A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 54, p. 193-203, 2018.
• AFONSO, V.; CONCEICAO, R.; SALDANHA, M.; BRAATZ, LUCIANO; PERLEBERG, M.; CORRÊA, G.; PORTO, MARCELO; AGOSTINI, L. V.; ZATT, Bruno; SUSIN, A. Energy-Aware Motion and Disparity Estimation System for 3D-HEVC with Run-Time Adaptive Memory Hierarchy. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 99, p. 1-10, 2018.
• SILVEIRA, DIEISON; ZATT, Bruno; AGOSTINI, L.; PORTO, Marcelo. Reference frame context-adaptive variable-length coder: a real-time hardware-friendly approach for lossless external memory bandwidth reduction in current video-coding systems. Journal of Real-Time Image Processing, v. 14, p. 249-265, 2018.
• SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Real-time scalable hardware architecture for 3D-HEVC bipartition modes. Journal of Real-Time Image Processing, v. 13, p. 71-83, 2017.
• SALDANHA, MÁRIO ; SANCHEZ, GUSTAVO ; ZATT, Bruno ; PORTO, Marcelo ; Agostini, Luciano . Energy-aware scheme for the 3D-HEVC depth maps prediction. Journal of Real-Time Image Processing, v. 13, p. 55-69, 2017.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Pareto-Based Method for High Efficiency Video Coding with Limited Encoding Time. IEEE Transactions on Circuits and Systems for Video Technology, v. 26, p. 1734-1745, 2016.
• SILVA, T.; AGOSTINI, L.; CRUZ, L. Fast intra prediction algorithm based on texture analysis for 3D-HEVC encoders. Journal of Real-Time Image Processing, v. 12, p. 357-368, 2016.
• CORREA, G.; AGOSTINI, L.; ASSUNCAO, P.; CRUZ, L. Complexity scalability for real-time HEVC encoders. Journal of Real-Time Image Processing, v. 12, p. 107-122, 2016.
• SANCHEZ, G.; JORDANI, L.; MARCON, C.; AGOSTINI, L. V. DFPS: A Fast Pattern Selector for Depth Modeling Mode 1 in Three-Dimensional High-Efficiency Video Coding Standard. Journal of Electronic Imaging (Print), v. 25, p. 063011, 2016.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Fast coding tree structure decision for HEVC based on classification trees. Analog Integrated Circuits and Signal Processing, v. 1, p. 1-11, 2016.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Fast HEVC Encoding Decisions Using Data Mining. IEEE Transactions on Circuits and Systems for Video Technology, v. 25, p. 660-673, 2015.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design. Journal of Real-Time Image Processing, v. sv, p. 1-21, 2015.
• SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. Hardware-friendly HEVC motion estimation: new algorithms and efficient VLSI designs targeting high definition videos. Analog Integrated Circuits and Signal Processing, v. 82, p. 135-146, 2014.
• AGOSTINI, L.; PORTO, M.; CRISTANI, C.; OGLIO, P.; SILVA, M.; MATOS, J.; BAMPI, S. Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos. Multimedia Tools and Applications, v. 63, p. 107-127, 2013.
• CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. Performance and Computational Complexity Assessment of High-Efficiency Video Encoders. IEEE Transactions on Circuits and Systems for Video Technology (Print), v. 22, p. 1899-1909, 2012.
• CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. Complexity control of high efficiency video encoders for power-constrained devices. IEEE Transactions on Consumer Electronics, v. 57, p. 1866-1874, 2011.
• AGOSTINI, L.; SILVA, I.; BAMPI, S. Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs. Microprocessors and Microsystems, v. 31, p. 487-497, 2007.
• AGOSTINI, L.; SILVA, I.; BAMPI, S. Parallel color space converters for JPEG image compression. Microelectronics and Reliability, Inglaterra, v. 44, n.4, p. 697-703, 2004.

Papers Published in Event Proceedings:

• SAGRILO, F.; LOOSE, M.; VIANA, R.; SANCHEZ, G.; CORRÊA, G.; AGOSTINI, L. Learning-Based Fast VVC Affine Motion Estimation. In: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, Monterey. Piscataway: IEEE, 2023. p. 1-5.
• DOMANSKI, R.; KOLODZIEJSKI, W.; PENNY, W.; PORTO, M.; ZATT, B.; AGOSTINI, L. High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation. In: 2023 IEEE International Conference on Image Processing (ICIP), 2023, Kuala Lumpur. Piscataway: IEEE, 2023. p. 2680-5.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Fast Transform Decision Scheme for VVC Intra-Frame Prediction Using Decision Trees. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1948-1952.
• DUARTE, A.; GONCALVES, P.; AGOSTINI, L.; ZATT, B.; CORREA, G.; PORTO, M.; PALOMINO, D. Fast Affine Motion Estimation for VVC using Machine-Learning-Based Early Search Termination. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1-5.
• GOEBEL, J.; COSTA, V.; AGOSTINI, L.; ZATT, B.; PORTO, M. A High-Throughput Design for the H.266/VVC Low-Frequency Non-Separable Transform. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1798-1802.
• CORREA, M.; ROMA, N.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. Mode-Adaptive Subsampling of SAD/SSE Operations for Intra Prediction Cost Reduction. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1808-1812.
• ROSA, P.; PALOMINO, D.; PORTO, M.; AGOSTINI, L. GM-RF: An Av1 Intra-Frame Fast Decision Based On Random Forest. In: 2022 IEEE International Conference on Image Processing (ICIP), 2022, Bordeaux. Piscataway: IEEE, 2022. p. 1-5.
• CORREA, G.; DALL’OGLIO, P.; PALOMINO, D.; AGOSTINI, L. Fast Block Size Decision for HEVC Encoders with On-the-Fly Trained Classifiers. In: 2020 28th European Signal Processing Conference (EUSIPCO), 2021, Amsterdam. Piscataway: IEEE, 2021. p. 540-544.
• STORCH, I.; CORREA, G.; ZATT, B.; AGOSTINI, L.; PALOMINO, D. ESA360 – Early SKIP Mode Decision Algorithm for Fast ERP 360 Video Coding. In: 2020 28th European Signal Processing Conference (EUSIPCO), 2021, Amsterdam. Piscataway: IEEE, 2021. p. 535-539.
• DOMANSKI, R.; KOLODZIEJSKI, W.; CORREA, G.; PORTO, M.; ZATT, B.; AGOSTINI, L. Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation. In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, Daegu. 2021. p. 1-5.
• STORCH, I.; ZATT, B.; AGOSTINI, L.; CORREA, G.; CRUZ, L.; PALOMINO, D. Spatially Adaptive Intra Mode Pre-Selection for ERP 360 Video Coding. In: ICASSP 2020 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2020, Barcelona. Piscataway: IEEE, 2020. p. 2178-2182.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Fast Partitioning Decision Scheme for Versatile Video Coding Intra-Frame Prediction. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla.  Piscataway: IEEE, 2020. p. 1-5.
• ZUMMACH, E.; PALAU, R.; GOEBEL, J.; PALOMINO, D.; AGOSTINI, L.; PORTO, M. Efficient Hardware Design for the AV1 CDEF Filter Targeting 4K UHD Videos. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.
• PENNY, W.; CORREA, G.; AGOSTINI, L.; PALOMINO, D.; PORTO, M.; NAZAR, G.; ZATT, B. Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.
• CORREA, M.; NETO, L.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. ASIC Solution for the Directional Intra Prediction of the AV1 Encoder Targeting UHD 4K Videos. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.
• SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. Complexity Analysis Of VVC Intra Coding. In: 2020 IEEE International Conference on Image Processing (ICIP), 2020, Abu Dhabi. Piscataway: IEEE, 2020. p. 3119-3123.
• CERVEIRA, A.; AGOSTINI, L.; ZATT, B.; SAMPAIO, F. Memory Assessment Of Versatile Video Coding. In: 2020 IEEE International Conference on Image Processing (ICIP), 2020, Abu Dhabi. Piscataway: IEEE, 2020. p. 1186-1190.
• CORREA, M.; WASKOW, B.; ZATT, B.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. High Throughput Hardware Design for AV1 Paeth and Smooth Intra Modes. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, Sapporo. Piscataway: IEEE, 2019. p. 1-5.
• SALDANHA, M.; SANCHEZ, G.; ZATT, B.; MARCON, C.; AGOSTINI, L. TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, Sapporo. Piscataway: IEEE, 2019. p. 1-5.
• GONCALVES, M.; AGOSTINI, L.; PALOMINO, D.; PORTO, M.; CORREA, G. Encoding Efficiency and Computational Cost Assessment of State-Of-The-Art Point Cloud Codecs. In: 2019 IEEE International Conference on Image Processing (ICIP), 2019, Taipei. Piscataway: IEEE, 2019. p. 3726-3730.
• BORGES, A.; ZATT, B.; PORTO, M.; AGOSTINI, L.; CORREA, G. Complexity Scalable HEVC-to-AV1 Transcoding Based on Coding Tree Depth Inheritance. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.
• CORREA, M.; ZATT, B.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. A Fast Local Mode Decision for the HEVC Intra Prediction Based on Direction Detection. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.
• BENDER, I.; PALOMINO, D.; AGOSTINI, L.; CORREA, G.; PORTO, M. Compression Efficiency and Computational Cost Comparison between AV1 and HEVC Encoders. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.
• SANCHEZ, G.; FERNANDES, R.; AGOSTINI, L.; MARCON, C. DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm. In: 2018 25th IEEE International Conference on Image Processing (ICIP), 2018, Athens. Piscataway: IEEE, 2018. p. 1782-1787.
• CONCEICAO, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. LF-CAE: Context-Adaptive Encoding for Lenslet Light Fields Using HEVC. In: 2018 25th IEEE International Conference on Image Processing (ICIP), 2018, Athens. Piscataway: IEEE, 2018. p. 3174-3179.
• MARTINS, ANDERSON; PENNY, WAGNER; WEBER, MATHEUS ; AGOSTINI, Luciano; PORTO, Marcelo; PALOMINO, Daniel ; MATTOS, JULIO ; ZATT, Bruno. Configurable Cache Memory Architecture for Low-Energy Motion Estimation. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.
• BRAATZ, LUCIANO; ZATT, Bruno; PALOMINO, Daniel; AGOSTINI, Luciano; PORTO, Marcelo. High-Throughput and Low-Power Integrated Direct/Inverse HEVC Quantization Hardware Design. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.
• SANCHEZ, GUSTAVO; AGOSTINI, Luciano; MARCON, CESAR. High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.
• AFONSO, VLADIMIR; SUSIN, Altamiro; PERLEBERG, MURILO; CONCEICAO, RUHAN; CORREA, Guilherme; AGOSTINI, Luciano; ZATT, Bruno; PORTO, Marcelo. Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.
• SEIDEL, ISMAEL; RODRIGUES FILHO, VANIO; AGOSTINI, Luciano; GUNTZEL, JOSE LUIS. Coding- and Energy-Efficient FME Hardware Design. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.
• SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. Fast 3D-HEVC Depth Maps Intra-Frame Prediction Using Data Mining. In: ICASSP 2018 – 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. Piscataway: IEEE, 2018. p. 1-5.
• GONCALVES, P.; PORTO, MARCELO; ZATT, Bruno; AGOSTINI, L. V.; CORRÊA, G. Octagonal-Axis Raster Pattern for Improved Test Zone Search Motion Estimation. In: ICASSP 2018 – 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. Piscataway: IEEE, 2018. p. 1-5.
• SANCHEZ, G.; AGOSTINI, L.; MARCON, C. Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.
• CORREA, M.; ZATT, B.; PORTO, M.; AGOSTINI, L. High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.
• AFONSO, V.; SUSIN, A.; AUDIBERT, L.; SALDANHA, M.; CONCEICAO, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.
• BRAATZ, L.; AGOSTINI, L.; ZATT, B.; PORTO, M. A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.
• SANCHEZ, G.; SALDANHA, M.; AGOSTINI, L.; MARCON, C. Depth modeling modes complexity control system for the 3D-HEVC video encoder. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1021-1060.
• AVILA, G.; CONCEICAO, R.; BUBOLZ, T.; ZATT, B.; PORTO, M.; AGOSTINI, L.; CORREA, G. Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1031-1070.
• SANCHEZ, G.; SALDANHA, M.; ZATT, B.; PORTO, M.; AGOSTINI, L.; MARCON, C. Edge-aware depth motion estimation a complexity reduction scheme for 3D-HEVC. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1524-1573.
• PENNY, W.; MACHADO, I.; PORTO, M.; AGOSTINI, L.; ZATT, B. Pareto-based energy control for the HEVC encoder. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 814-819.
• STORCH, I.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. Speedup-aware history-based tiling algorithm for the HEVC standard. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 824-829.
• CONCEICAO, R.; AVILA, G.; CORREA, G.; PORTO, M.; ZATT, B.; AGOSTINI, L. Complexity reduction for 3D-HEVC depth map coding based on early Skip and early DIS scheme. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 1116-1121.
• PAIM, G.; GOEBEL, J.; PENNY, W.; ZATT, B.; PORTO, M.; AGOSTINI, L. High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2162-2167.
• PAIM, G.; PENNY, W.; GOEBEL, J.; AFONSO, V.; SUSIN, A.; PORTO, M.; ZATT, B.; AGOSTINI, L. An efficient sub-sample interpolator hardware for VP9-10 standards. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2167-2172.
• SEIDEL, I.; CANCELLIER, L.; GUNTZEL, J.; AGOSTINI, L. Rate-constrained successive elimination of Hadamard-based SATDs. In: 2016 IEEE International Conference on Image Processing (ICIP), 2016, Phoenix. p. 2395-2399.
• CORREA, G.; AGOSTINI, L.; CRUZ, L. Fast H.264/AVC to HEVC Transcoder Based on Data Mining and Decision Trees. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 2539-2542.
• GOEBEL, J.; PAIM, G.; AGOSTINI, L.; ZATT, B.; PORTO, M. An HEVC Multi-Size DCT Hardware with Constant Throughput and Supporting Heterogeneous CUs. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 2202-2205.
• SEIDEL, I.; BRASCHER, A.; GÜNTZEL, J.; AGOSTINI, L. Energy-Efficient SATD for Beyond HEVC. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, Montreal. Piscataway: IEEE, 2016. p. 802-805.
• CORREA, G.; ASSUNCAO, P.; CRUZ, LUIS A.; AGOSTINI, L. Encoding time control system for HEVC based on Rate-Distortion-Complexity analysis. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 1114-1117.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A real-time architecture for reference frame compression for high definition video coders. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 842-845.
• SALDANHA, M.; SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. Complexity reduction for the 3D-HEVC depth maps coding. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 621-624.
• MAICH, H.; PAIM, G.; AFONSO, V.; AGOSTINI, L.; ZATT, B.; PORTO, M. A multi-standard interpolation hardware solution for H.264 and HEVC. In: 2015 IEEE International Conference on Image Processing (ICIP), 2015, Quebec City. p. 2910-2914.
• SILVA, T.; AGOSTINI, L.; CRUZ, L. Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction. In: 2015 IEEE International Conference on Multimedia and Expo (ICME), 2015, Turin. p. 1-6.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A low-complexity and lossless reference frame encoder algorithm for video coding. In: ICASSP 2014 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2014, Florence. p. 7358-7362.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 2624-2627.
• CONCEICAO, R.; SOUZA, J.; JESKE, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 1925-1928.
• SANCHEZ, G.; SALDANHA, M.; BALOTA, GABRIEL ; ZATT, B.; PORTO, M.; AGOSTINI, L. Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 3209-3213.
• SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 5641-5645.
• SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; BAMPI, S.; HENKEL, J. Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding. In: Design Automation and Test in Europe, 2013, Grenoble. New Jersey: IEEE Conference Publications. p. 665-670.
• SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; HENKEL, J.; BAMPI, S. Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1831-1835.
• GRELLERT, M.; SHAFIQUE, M.; KHAN, M.; AGOSTINI, L.; MATTOS, J.; HENKEL, J. An adaptive workload management scheme for HEVC encoding. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1850-1854.
• SANCHEZ, G.; PORTO, M.; AGOSTINI, L. A hardware friendly motion estimation algorithm for the emergent HEVC standard and its low power hardware design. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1991-1994.
• SILVEIRA, D.; PORTO, M.; AGOSTINI, L. A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture. In: ICME 2013 – IEEE International Conference on Multimedia and Expo, 2013, San Jose. Piscatway: IEEE, 2013. p. 1-6.
• SANCHEZ, G.; AGOSTINI, L.; SAMPAIO, F.; PORTO, M.; BAMPI, S. Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design. In: ICME 2012 – IEEE International Conference on Multimedia & Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 1079-1084.
• SAMPAIO, F.; BAMPI, S.; SILVA, M.; AGOSTINI, L.; MATOS, J. Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter‐Prediction of HEVC Encoders. In: ICME 2012 – IEEE International Conference on Multimedia & Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 657-662.
• CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. Motion compensated tree depth limitation for complexity control of HEVC encoding. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 217-220.
• PALOMINO, D.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; SUSIN, A. A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 201-204.
• VIANNA, H.; SANCHEZ, G.; PORTO, M.; AGOSTINI, L. High performance hardware architectures for the inverse Rotational Transform of the emerging HEVC standard. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 189-192.
• SILVA, M.; SAMPAIO, F.; MATOS, J.; AGOSTINI, L. A Multilevel Data Reuse Scheme for Motion Estimation and Its VLSI Design. In: ISCAS 2011 – IEEE International Symposium on Circuits and Systems, 2011, Rio de Janeiro. New York: IEEE, 2011. p. 583-586.
• ZATT, B.; MUHAMMAD, S.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; HENKEL, J. Run-Time Adaptive Energy-Aware Motion and Disparity Estimation in Multiview Video Coding. In: DAC2011 – 48th Design Automation Conference, 2011, San Diego. Piscataway: IEEE, 2011. p. 1026-1031.
• CORRÊA, G.; PALOMINO, D.; DINIZ, C.; AGOSTINI, L.; BAMPI, S. SHBS: A Heuristic for Fast Inter Mode Decision of H.264/AVC Standard Targeting VLSI Design. In: ICME 2011 – IEEE International Conference on Multimedia & Expo, 2011, Barcelona. Piscataway: IEEE, 2011. p. 1-4.
• DINIZ, C.; ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. A Real Time H.264/AVC Intra Frame Prediction Hardware Architecture for HDTV 1080P Videos. In: 2009 IEEE International Conference on Multimedia and Expo, 2009, New York. Piscataway: IEEE, 2009. p. 1138-1141.
• PALOMINO, D.; SAMPAIO, F.; DORNELLES, R.; AGOSTINI, L. Low Latency and High Throughput Dedicated Loop of Transforms and Quantization Focusing in the H.264/AVC Intra Prediction. In: IEEE ICIP 2009 – IEEE International Conference on Image Processing, 2009, Cairo. Piscataway: IEEE, 2009. p. 2697-2700.
• PORTO, M. ; AGOSTINI, L.; BAMPI, S.; SUSIN, A. A High Throughput and Low Cost Diamond Search Architecture for HDTV Motion Estimation. In: ICME2008 – IEEE International Conference on Multimedia & Expo, 2008, Hannover. Piscataway: IEEE, 2008. p. 1033-1036.
• ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. HP422-MoCHA: A H.264/AVC High Profile Motion Compensation Architecture for HDTV. In: ISCAS2008 – 2008 IEEE International Symposium on Circuits and Systems, 2008, Seattle. Piscataway: IEEE, 2008. p. 25-28.
• AZEVEDO, A.; ZATT, B.; AGOSTINI, L.; BAMPI, S. MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. In: ISCAS 2007 – IEEE International Symposium on Circuits and Systems, 2007, New Orleans. Piscataway: IEEE, 2007. p. 1617-1620.
• AGOSTINI, L.; PORTO, R.; GÜNTZEL, J.; SILVA, I.; BAMPI, S. High Throughput Multitransform and Multiparallelism IP for the H.264/AVC Video Compression Standard. In: ISCAS 2006 – IEEE International Symposium on Circuits and Systems, 2006, Ilha de Kos. Piscataway: IEEE, 2006. p. 5417-5422.
• AGOSTINI, L.; AZEVEDO, A.; ROSA, V.; BERRIEL, E.; SANTOS, T.; BAMPI, S.; SUSIN, A. FPGA Design of a H.264/AVC Main Profile Decoder for HDTV. In: FPL 2006 – 16th IEEE International Conference on Field Programmable Logic and Applications, 2006, Madri. Piscataway: IEEE, 2006. p. 501-506.