{"id":81,"date":"2016-11-11T11:48:30","date_gmt":"2016-11-11T13:48:30","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/gaci\/?page_id=81"},"modified":"2016-11-11T11:48:30","modified_gmt":"2016-11-11T13:48:30","slug":"cadence-program","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/gaci\/cadence-program\/","title":{"rendered":"Cadence Program"},"content":{"rendered":"<p align=\"JUSTIFY\">Universidade Federal de Pelotas (UFPel)<br \/>\nCentro de Desenvolvimento Tecnol\u00f3gico (CDTec) \u2013 Computa\u00e7\u00e3o<br \/>\nCadence University Program Member<\/p>\n<p align=\"JUSTIFY\">The Computer Science undergraduate course, the Computer Engineering undergraduate course and the Computer Science graduate course of UFPel are having access to leading industry EDA tools via Cadence University Software Program License Agreement.<\/p>\n<p align=\"JUSTIFY\">Cadence EDA tools have been incorporated into classes and research design flows:<\/p>\n<ul>\n<li>\n<p align=\"JUSTIFY\"><strong>Concep\u00e7\u00e3o de Circuitos Integrados (68h)<\/strong><\/p>\n<\/li>\n<\/ul>\n<p align=\"JUSTIFY\">Semiconductor devices and logic circuits; IC fabrication; design rules and digital design methodology;\u00a0basic digital building block\u00b4s design.<\/p>\n<ul>\n<li>\n<p align=\"JUSTIFY\"><strong>Ferramentas de CAD para Circuitos Integrados (68h)<\/strong><\/p>\n<\/li>\n<\/ul>\n<p align=\"JUSTIFY\">Logic synthesis; verification; technology mapping; simulation; layout compaction; floorplanning; partitioning; routing.<\/p>\n<ul>\n<li>\n<p align=\"JUSTIFY\"><strong>Circuitos Integrados Anal\u00f3gicos (68h)<\/strong><\/p>\n<\/li>\n<\/ul>\n<p align=\"JUSTIFY\">Operational amplifiers design basics; simulation practice; frequency response of amplifiers; noise analysis; feedback and frequency compensation; case studies in analog design: low power design, switched capacitor circuits, layout techniques.<\/p>\n<ul>\n<li>\n<p align=\"JUSTIFY\"><strong>Projeto de Sistemas Integrados Mistos (68h)<\/strong><\/p>\n<\/li>\n<\/ul>\n<p align=\"JUSTIFY\">Design cases of mixed-signal CMOS integrated systems.<\/p>\n<p align=\"JUSTIFY\">The following Cadence Packages are currently been used to develop classes and researches:<\/p>\n<ul>\n<li>Custom IC;<\/li>\n<li>Digital IC.<\/li>\n<\/ul>\n<p align=\"RIGHT\">Last update: June 16, 2014<\/p>\n<p align=\"CENTER\">Cadence is a registered trademark of Cadence Design Systems, Inc.<br \/>\n2655 Seely Avenue, San Jose, CA 95134<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Universidade Federal de Pelotas (UFPel) Centro de Desenvolvimento Tecnol\u00f3gico (CDTec) \u2013 Computa\u00e7\u00e3o Cadence University Program Member The Computer Science undergraduate course, the Computer Engineering undergraduate course and the Computer Science graduate course of UFPel are having access to leading industry EDA tools via Cadence University Software Program License Agreement. Cadence EDA tools have been incorporated &hellip; <a href=\"https:\/\/wp.ufpel.edu.br\/gaci\/cadence-program\/\" class=\"more-link\">Continue lendo <span class=\"screen-reader-text\">Cadence Program<\/span> <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":163,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"jetpack_post_was_ever_published":false,"footnotes":""},"class_list":["post-81","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/P86b0z-1j","_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/pages\/81","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/users\/163"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/comments?post=81"}],"version-history":[{"count":1,"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/pages\/81\/revisions"}],"predecessor-version":[{"id":83,"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/pages\/81\/revisions\/83"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/gaci\/wp-json\/wp\/v2\/media?parent=81"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}