Cadence Program

Universidade Federal de Pelotas (UFPel)
Centro de Desenvolvimento Tecnológico (CDTec) – Computação
Cadence University Program Member

The Computer Science undergraduate course, the Computer Engineering undergraduate course and the Computer Science graduate course of UFPel are having access to leading industry EDA tools via Cadence University Software Program License Agreement.

Cadence EDA tools have been incorporated into classes and research design flows:

  • Concepção de Circuitos Integrados (68h)

Semiconductor devices and logic circuits; IC fabrication; design rules and digital design methodology; basic digital building block´s design.

  • Ferramentas de CAD para Circuitos Integrados (68h)

Logic synthesis; verification; technology mapping; simulation; layout compaction; floorplanning; partitioning; routing.

  • Circuitos Integrados Analógicos (68h)

Operational amplifiers design basics; simulation practice; frequency response of amplifiers; noise analysis; feedback and frequency compensation; case studies in analog design: low power design, switched capacitor circuits, layout techniques.

  • Projeto de Sistemas Integrados Mistos (68h)

Design cases of mixed-signal CMOS integrated systems.

The following Cadence Packages are currently been used to develop classes and researches:

  • Custom IC;
  • Digital IC.

Last update: June 16, 2014

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Universidade Federal de Pelotas