{"id":782,"date":"2023-05-25T11:38:53","date_gmt":"2023-05-25T14:38:53","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/?page_id=782"},"modified":"2023-06-01T09:19:00","modified_gmt":"2023-06-01T12:19:00","slug":"artigos-sessoes","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/artigos-sessoes\/","title":{"rendered":"Artigos – Sess\u00f5es"},"content":{"rendered":"\n\n\n\n\n\n\n\n\n\n
SESS\u00c3O I – Dia 31\/05 (Quarta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
08:30<\/td>\nComparison of Ring Oscillator Topologies Using CMOS Inverters and Differential Pair Amplifiers as Delay Cells<\/strong><\/td>\nFelipe Z Righi (UNIPAMPA); Vin\u00edcius Guimar\u00e3es (UNIPAMPA); Lucas Severo (UNIPAMPA)<\/td>\n<\/tr>\n
08:45<\/td>\nSelective Method with Adapted Activation Function and Applied in Non-linear Optimization for Modeling of Power Amplifiers<\/strong><\/td>\nAna Paula Princival Machado (UFPR); Eduardo Lima (UFPR)<\/td>\n<\/tr>\n
09:00<\/td>\nBehavioral Modeling Using Volterra Series with Imposition of Small Signals in One Input<\/strong><\/td>\nDaniele Richartz (UFPR); Eduardo Lima (UFPR); Ana Pelegrini (UFPR)<\/td>\n<\/tr>\n
09:15<\/td>\nProduct between multi-layer perceptron and finite impulse response filter applied to behavioral modeling of power amplifiers<\/strong><\/td>\nMatheus Henrique Silveira Santana (UFPR); Eduardo Gon\u00e7alves de Lima (UFPR)<\/td>\n<\/tr>\n
09:30<\/td>\nComparison Between Least Squares and Nonlinear Optimization in Obtaining Coefficients from the Product of Two Volterra Series<\/strong><\/td>\nLucas V D Santos (UFPR); Eduardo Lima (UFPR)<\/td>\n<\/tr>\n
09:45<\/td>\nComparative Analysis of RF Passive Impedance Matching Networks on Low-Cost FR4 Substrate<\/strong><\/td>\nGustavo H Flach (UFPR); Ivan Adam (UFPR); Andr\u00e9 Mariano (UFPR)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\n\n\n\n\n\n\n\n\n\n\n\n
SESS\u00c3O II – Dia 31\/05 (Quarta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
10:30<\/td>\nEMG Capture Board Project with Microcontroller Shipped for Use in Myoelectric Prosthesis<\/strong><\/td>\nHigor Stachin (UTFPR); Linnyer Ruiz (UEM); Andr\u00e9 Luiz R. Monteiro (UTFPR); Rodrigo H\u00fcbner (UTFPR)<\/td>\n<\/tr>\n
10:45<\/td>\nNew Modified 4:2 Approximate Compressors for Low-power Applications<\/strong><\/td>\nVinicius Zanandrea (UFSC); Cristina Meinhardt (UFSC)<\/td>\n<\/tr>\n
11:00<\/td>\nEvaluating the JART Memristor Model in different Logic Styles<\/strong><\/td>\nHelisa s de Lima (UFRGS); Cesar Dias (UFRGS); Raphael Brum (UFRGS); Paulo Butzen (UFRGS)<\/td>\n<\/tr>\n
11:15<\/td>\nThe influence of Random Telegraph Noise on Ion and Ioff currents and a proof of their Chaotic Nature<\/strong><\/td>\nElias de Almeida Ramos (UFRGS); Ricardo Reis (UFRGS)<\/td>\n<\/tr>\n
11:30<\/td>\nA Minimal Physical Implementation of the PicoSoC<\/strong><\/td>\nRodrigo Wuerdig (UFRGS); Leonardo H. Brendler (UFRGS); Claudio M Diniz (UFRGS); Ricardo Reis (UFRGS); Sergio Bampi (UFRGS)<\/td>\n<\/tr>\n
11:45<\/td>\nBuilding a Remote Monitoring System with Resource-Constrained Microprocessors<\/strong><\/td>\nEnzo V Zucchetti Pietta (UFRGS); Lucas Dal Castel (UFRGS); Jos\u00e9 Rodrigo Azambuja (UFRGS)<\/td>\n<\/tr>\n
12:00<\/td>\nReliability in Approximate Circuits<\/strong><\/td>\nMatheus F Pontes (UFPel); Jo\u00e3o J\u00fanior da Silva Machado (IFSul); Leomar Rosa Jr (UFPel); Paulo Butzen (UFRGS)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\n\n\n\n\n\n\n\n\n\n\n
SESS\u00c3O III – Dia 01\/06 (Quinta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
08:30<\/td>\nA Low Noise Signal Conditioning Circuit for Analog MEMS Accelerometers<\/strong><\/td>\nMarcelo Romanssini (UNIPAMPA); Lucas Severo (UNIPAMPA); Paulo Aguirre (UNIPAMPA); Alessandro Girardi (UNIPAMPA)<\/td>\n<\/tr>\n
08:45<\/td>\nOffset Compensation Techniques for a Multi-Stage Comparator<\/strong><\/td>\nBeatriz Estefania Hatschbach Rezende (UNIPAMPA); Jo\u00e3o Lucas Johan Brum (UNIPAMPA); Martina Correa Rodrigues (UNIPAMPA; Chipus Microelectronics); Lucas Compassi Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA); William Prodanov (Chipus Microelectronics); Paulo Cesar Comassetto de Aguirre (UNIPAMPA)<\/td>\n<\/tr>\n
09:00<\/td>\nComparative Analysis of MOSFET Current Mirrors<\/strong><\/td>\nVin\u00edcius Betim Guimar\u00e3es (UNIPAMPA); Felipe Righi (UNIPAMPA); Lucas Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA)<\/td>\n<\/tr>\n
09:15<\/td>\nPV Cell for Indoor VLC: Measurement and Characterization<\/strong><\/td>\nVit\u00f3ria Monteiro (UNIPAMPA); Diego Maran de Mattos (UNIPAMPA); Paulo Aguirre (UNIPAMPA); Lucas Severo (UNIPAMPA); Alessandro Girardi (UNIPAMPA)<\/td>\n<\/tr>\n
09:30<\/td>\nDesign of a Low-Voltage 3-Bit Rail-to-Rail Flash ADC for GNSS Application<\/strong><\/td>\nRamon H. Vieira (UNIPAMPA); Tawan Chrysther dos Santos (UNIPAMPA); Renan Dotto Pacheco de Oliveira (UNIPAMPA); Martina C. Rodrigues (UNIPAMPA); Alessandro Girardi (UNIPAMPA); Lucas C. Severo (UNIPAMPA); Paulo C\u00e9sar C. de Aguirre (UNIPAMPA)<\/td>\n<\/tr>\n
12:00<\/td>\nExploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing<\/strong><\/td>\nMorgana Macedo Azevedo da Rosa (UFPel ); Eduardo Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\n\n\n\n\n\n\n\n\n\n\n\n
SESS\u00c3O IV – Dia 01\/06 (Quinta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
10:30<\/td>\nPredicting Routing Congestion During Logic Synthesis With Graph Neural Networks<\/strong><\/td>\nAugusto Berndt (UFSC); Cristina Meinhardt (UFSC)<\/td>\n<\/tr>\n
10:45<\/td>\nExploring Selective Gate Hardening to Improve Circuit Reliability<\/strong><\/td>\nJo\u00e3o J\u00fanior da Silva Machado (IFSul); Matheus F Pontes (UFPel); Marcio Oliveira da Rocha (IFSul); Denis Teixeira Franco (UFPel); Leomar Soares da Rosa Junior (UFPel); Paulo Francisco Butzen (UFRGS)<\/td>\n<\/tr>\n
11:00<\/td>\nATMR design by construction based on two-level ALS<\/strong><\/td>\nGabriel Ammes (UFRGS); Guilherme Manske (UFRGS); Paulo Butzen (UFRGS); Andr\u00e9 Reis (UFRGS); Renato Ribas (UFRGS)<\/td>\n<\/tr>\n
11:15<\/td>\nIntracell Routing for Automatic Cell Generation Using an SMT Solver<\/strong><\/td>\nVitor Hugo Fuerstenau Maciel (UFRGS); Jos\u00e9 Eduardo Thums (UFRGS); Ricardo Reis (UFRGS)<\/td>\n<\/tr>\n
11:30<\/td>\nSusceptibility analysis of different XOR designs against Single Event Transient Faults<\/strong><\/td>\nAna Fl\u00e1via D Reis (FURG); Ingrid Oliveira (UFPEL); Rafael Schvittz (FURG)<\/td>\n<\/tr>\n
11:45<\/td>\nComparative analysis of XOR logic considering different designs against Single Event Transient faults<\/strong><\/td>\nVinicios C Costa (FURG); Ingrid Oliveira (UFPel); Rafael Schvittz (FURG)<\/td>\n<\/tr>\n
12:00<\/td>\nUsage of Formal Sequential Equivalence Checking to verify late changes on RTL projects<\/strong><\/td>\nM\u00f4nica K Pereira (Cadence Design Systems); Luiza Pena (Cadence Design Systems); Ricardo Duarte (UFMG)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\n\n\n\n\n\n\n\n\n\n\n
SESS\u00c3O V – Dia 02\/06 (Sexta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
08:30<\/td>\nStudy and Comparison of Image Processing Methods for Vehicle License Plate Recognition<\/strong><\/td>\nHenrique Fragoso (IFC); Marcelo A Soares (IFC); Fabio Terra (fabio.terra@ifc.edu.br); Jean Dalcin (IFC); Regina Marin (IFC)<\/td>\n<\/tr>\n
08:45<\/td>\nExploitation of Approximation Storage at VVC Inter-Frame Prediction Memories<\/strong><\/td>\nYasmin S Camargo (UFPel); Felipe Sampaio (IFRS); Daniel Palomino (UFPel); Bruno Zatt (UFPel)<\/td>\n<\/tr>\n
09:00<\/td>\nMulti-Size Inverse DCT-II Hardware Design for the VVC Decoder<\/strong><\/td>\nBruna R Garcia (UFPel); Bianca Silveira (UFPel); Claudio M Diniz (UFRGS); Daniel Palomino (UFPel); Guilherme Correa (UFPel)<\/td>\n<\/tr>\n
09:15<\/td>\nUSING DECISION TREES TO SAVE ENERGY IN H.266-TO-AV1 VIDEO TRANSCODING<\/strong><\/td>\nCaroline S Camargo (UFPel); Alex Borges (UFPel); Guilherme Correa (UFPel)<\/td>\n<\/tr>\n
09:30<\/td>\nImproving Video Coding Efficiency Through Frame Elimination and VFI Reconstruction<\/strong><\/td>\nAndr\u00e9 Beims Br\u00e4scher (UFSC); Gabriela Furtado da Silveira (UFSC); Luiz Henrique Cancellier (UFSC); Ismael Seidel (UFSC); Mateus Grellert (UFRGS); Jos\u00e9 Lu\u00eds Almada G\u00fcntzel (UFSC)<\/td>\n<\/tr>\n
09:45<\/td>\nArea and Energy Evaluation of an FME Hardware Architecture for HEVC and VVC Encoders<\/strong><\/td>\nNicole Citadin (UFSC); Vanio Rodrigues Filho (UFSC); Ismael Seidel (UFSC); Marcio Monteiro (UFSC); Mateus Grellert (UFRGS); Jos\u00e9 G\u00fcntzel (UFSC)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

 <\/p>\n

\n\n\n\n\n\n\n\n\n
SESS\u00c3O VI – Dia 02\/06 (Sexta-Feira)<\/strong><\/span><\/th>\n<\/tr>\n
HOR\u00c1RIO<\/span><\/strong><\/td>\nT\u00cdTULO<\/span><\/strong><\/td>\nAUTORES(AS)<\/span><\/strong><\/td>\n<\/tr>\n
11:15<\/td>\nRate-Distortion and Complexity Analysis of Fast Video Encoders<\/strong><\/td>\nEduardo F Lodi (UFSC); Arthur S Rodrigues (UFSC); Ismael Seidel (UFSC); Guilherme Correa (UFPel); Mateus Grellert (UFRGS)<\/td>\n<\/tr>\n
11:30<\/td>\nA Power-efficient Kernel Configurable Gaussian Filter Architecture<\/strong><\/td>\nMarcio Monteiro (UFSC); Ismael Seidel (UFSC); Jos\u00e9 G\u00fcntzel (UFSC); Mateus Grellert (UFRGS); Leonardo B Soares (IFRS); Cristina Meinhardt (UFSC)<\/td>\n<\/tr>\n
11:45<\/td>\nEnergy and Computing Assessment of Video Processing Kernels on CPU and FPGA platforms<\/strong><\/td>\nJo\u00e3o G Firta Foes (UFSC); Fillipi Mangrich (UFSC); Ismael Seidel (UFSC); Mateus Grellert (UFRGS);<\/td>\n<\/tr>\n
12:00<\/td>\nAxRSU: Approximate Radix-4 Squarer Unit<\/strong><\/td>\nMorgana Macedo Azevedo da Rosa (UFPel ); Guilherme Paim (UFRGS); Jorge Castro (Instituto Tecnologico de Costa Rica – TEC); Eduardo Costa (UCPel); Rafael Soares (UFPel); Sergio Bampi (UFRGS)<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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SESS\u00c3O I – Dia 31\/05 (Quarta-Feira) HOR\u00c1RIO T\u00cdTULO AUTORES(AS) 08:30 Comparison of Ring Oscillator Topologies Using CMOS Inverters and Differential Pair Amplifiers as Delay Cells Felipe Z Righi (UNIPAMPA); Vin\u00edcius Guimar\u00e3es (UNIPAMPA); Lucas Severo...<\/p>\n","protected":false},"author":746,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-782","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/pages\/782","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/users\/746"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/comments?post=782"}],"version-history":[{"count":37,"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/pages\/782\/revisions"}],"predecessor-version":[{"id":933,"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/pages\/782\/revisions\/933"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/emicrosim2023\/wp-json\/wp\/v2\/media?parent=782"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}