Daniel Menard & Wassim Hamidouche
INSA Rennes (France)
Toward Real Time Implementations of VVC Codecs
Language: English
Date: October 26th / 13h30 – 14h45 (UTC-3)
Abstract
The next generation ISO-MPEG/ITU-VCEG video coding standard called Versatile Video Coding (VVC) has been released in July 2020. VVC includes several coding tools enabling significant coding gains estimated to 25% and 35% of bitrate reductions for the same PSNR quality than HEVC in All Intra (AI) and Random Access (RA) coding configurations, respectively. Subjective comparison conducted between HEVC and VVC, has shown that this gain is even higher and can reach 50% of bit-rate reduction for the same perceived video quality. However, this coding gain comes at the expense of complexity increase at both encoder and decoder. The VVC encoder is estimated to be 10x more complex than HEVC in RA configuration and 27x in AI configuration. The complexity of the VVC decoder is doubled compared to HEVC. Thus, implementing software and hardware real time VVC codecs is a challenge. In the first part of this talk, the reduction of the VVC encoder complexity is considered. First the different complexity reduction techniques are reviewed and a deep-learning based approach is detailed. In the second part of the talk, the efficient implementation of software decoder is considered. The different optimization techniques are described and the implementation performance is evaluated.
Biography
Daniel Menard received the Ph.D. and Habilitation degrees in Signal Processing and Telecommunications from the University of Rennes, respectively in 2002 and 2011. Since 2012, he has been Full-Professor at INSA Rennes – department of Electrical and Computer Engineering and member of the IETR lab. He has 20 years of expertise in the design and implementation of image and signal processing systems. His research interests include low power video codecs, approximate computing and energy consumption.
He has a long experience of collaborative projects, he has been involved in different national and European projects He is currently member of different Technical Program Committees of international conferences (ICASSP, SiPS and DATE). Since 2018, he has been an elected member of the Technical Committee ASPS of the IEEE Signal Processing society. He has published more than 100 scientific papers in international journal and conferences.
Wassim Hamidouchereceived Master’s and Ph.D. degrees both in Image Processing from the University of Poitiers (France) in 2007 and 2010, respectively. From 2011 to 2013, he was a junior scientist in the video coding team of Canon Research Center in Rennes (France). He was a post-doctoral researcher from Apr. 2013 to Aug. 2015 with VAADER team of IETR where he worked under collaborative project on HEVC video standardisation. Since Sept. 2015 he is an Associate Professor at INSA Rennes and a member of the VAADER team of IETR Lab. He has joined the Advanced Media Content Lab of b<>com IRT Research Institute as an academic member in Sept. 2017. His research interests focus on video coding and multimedia security. He is the author/coauthor of more than one hundred and thirty (+130) papers at top journals and conferences in image processing, two MPEG standards, three patents, several MPEG contributions, public datasets and open source software projects.