{"id":772,"date":"2018-05-29T17:09:23","date_gmt":"2018-05-29T20:09:23","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/?page_id=772"},"modified":"2018-08-20T11:44:29","modified_gmt":"2018-08-20T14:44:29","slug":"feec-2018-melanie-berg","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/feec-2018-melanie-berg\/","title":{"rendered":"SBCCI Invited Talk: Melanie Berg"},"content":{"rendered":"

Melanie Berg<\/span>
\nAS&D Inc. in support of NASA\/GSFC – USA<\/span>
\nThursday, Aug. 30 \u2013 13:40h\u00a0 – Malbec B<\/span><\/strong><\/p>\n

\"\"

Melanie Berg<\/strong><\/p><\/div>\n

SBCCI INVITED TALK:
\nFPGA Mitigation Strategies for Critical Space Applications<\/strong><\/h2>\n

Technology is changing at a fast pace. Transistor geometries are getting smaller, voltage thresholds are getting lower, design complexity is exponentially increasing, and user options are expanding. Consequently, reliable insertion of error detection and correction (EDAC) circuitry has become relatively challenging. As a response, a variety of mitigation techniques are being implemented. They range from weaker EDAC circuits that save area and power to strong mitigation strategies that come at a great expense to the system.<\/p>\n

Regarding FPGA and ASIC EDAC insertion, there is no \u201cone-solution-fits-all.\u201d The user must be aware of a variety of concerns. As an example, each FPGA device-type requires a different mitigation strategy for various reasons.<\/p>\n

This presentation will focus on the susceptibilities of a variety of FPGA types and ASICs in the avionics and space environment. In addition, the user will be provided information on what are the optimal mitigation strategies per FPGA and ASIC. Internal device component mitigation versus system level mitigation will also be discussed.<\/p>\n

.<\/span><\/p>\n

Speaker’s Biography:<\/strong><\/h2>\n

Melanie Berg received her MS degree in Electrical Engineering from the University of Pittsburgh in 1990. Since 1988, she has been a designer, verification engineer, instructor, and reviewer, for a variety of high-speed multi-million gate ASIC and FPGA development teams. One of her more visible accomplishments was her role as a designer and verification engineer in the NASA sponsored New Horizons Pluto and Beyond Mission.
\nMs. Berg is currently a member of the Radiation Effects and Analysis group at NASA Goddard Space Flight Center (GSFC). Her NASA\/GSFC responsibilities include: developing flight designs, performing design reviews, investigating FPGA\/ASIC mitigation strategies for critical missions, and calculating mission survivability\/reliability predictions.
\nMs. Berg has published and presented several papers concerning such topics as: Reliable Synchronous Design Methodology, Robust Verification Techniques, Mitigation Strategies for Critical Circuitry, Survivability Predictions, Hardness Assurance for Space Flight Systems, and ASIC\/FPGA Trust\/Security Schemes.<\/p>\n","protected":false},"excerpt":{"rendered":"

Melanie Berg AS&D Inc. in support of NASA\/GSFC – USA Thursday, Aug. 30 \u2013 13:40h\u00a0 – Malbec B SBCCI INVITED TALK: FPGA Mitigation Strategies for Critical Space Applications Technology is changing at a fast...<\/p>\n","protected":false},"author":685,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"jetpack_post_was_ever_published":false,"footnotes":""},"class_list":["post-772","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/P9e0OP-cs","jetpack_likes_enabled":false,"jetpack-related-posts":[{"id":986,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/program-schedule\/","url_meta":{"origin":772,"position":0},"title":"Program Schedule","author":"agostini","date":"18\/07\/2018","format":false,"excerpt":"Chip in the Pampa 2018 Schedule Monday, Aug. 27 9:00h Assemblage - Event Registration 13:40h Pinot C - Meeting of SBMicro Board 13:40h Pinot D - Meeting of SBC\/CECCI Board 15:40h Pinot Lobby - Coffee-Break 16:20h Pinot A - Meeting of SBCCI Steering Committee 16:20h Pinot B - Meeting of\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":1039,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/sbcci-2018-technical-program\/","url_meta":{"origin":772,"position":1},"title":"SBCCI 2018 Technical Program","author":"agostini","date":"19\/07\/2018","format":false,"excerpt":"SBCCI 2018 Final Technical Program Papers assigned with an asterisk are the SBCCI2018 Best Paper Candidates. Tuesday, Aug. 28 9:00h Malbec B \u2013 Tutorial Integrated switched-capacitor DC-DC converters for high-density capacitive energy storage Filip Tavernier (KU Leuven \u2013 Belgium) 10:20h Carmen\u00e8re - Coffee-Break 10:40h Malbec A \u2013 Tutorial DC and\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":861,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/sbcci-2018-andrea-tavares\/","url_meta":{"origin":772,"position":2},"title":"SBCCI Invited Talk: Andrea Tavares","author":"agostini","date":"11\/07\/2018","format":false,"excerpt":"Andrea Tavares Cadence Design Systems - Brazil Friday, Aug. 31 \u2013 13:40h - Malbec B SBCCI INVITED TALK: Machine Learning initiatives in EDA industry Recent Deep Learning success has revival the interest on use of Machine Learning and Data Science in microelectronics industry. From specialized and dedicated IP design to\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"https:\/\/i0.wp.com\/wp.ufpel.edu.br\/chipinthepampa2018\/files\/2018\/07\/Andrea.jpg?resize=350%2C200&ssl=1","width":350,"height":200},"classes":[]},{"id":656,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/sbcci-2018-victor-grimblatt\/","url_meta":{"origin":772,"position":3},"title":"SBCCI Invited Talk: Victor Grimblatt","author":"agostini","date":"23\/04\/2018","format":false,"excerpt":"Victor Grimblatt Synopsys Chile R&D Center - Chile Wednesday, Aug. 29 \u2013 13:40h\u00a0- Malbec B SBCCI INVITED TALK: The Pace Of Innovation \"Innovation runs at a scarily fast pace.\u201d [William H. Gates III]. Our industry is now moving into the 5\/3 nanometer nodes, which will require an unprecedented level of\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"https:\/\/i0.wp.com\/wp.ufpel.edu.br\/chipinthepampa2018\/files\/2018\/04\/Victor-267x400.jpg?resize=350%2C200&ssl=1","width":350,"height":200},"classes":[]},{"id":573,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/events\/sbcci-2018\/sbcci-submissions\/","url_meta":{"origin":772,"position":4},"title":"SBCCI SUBMISSIONS","author":"agostini","date":"16\/03\/2018","format":false,"excerpt":"Instructions for the Authors Prospective authors from around the world are invited to submit manuscripts in English for consideration by the Program Committee. Manuscripts may have up to 6 pages, must be formatted as two-column document following the IEEE guidelines (templates can be found HERE) and must be prepared for\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":49,"url":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/events\/sbcci-2018\/","url_meta":{"origin":772,"position":5},"title":"SBCCI 2018","author":"agostini","date":"27\/09\/2017","format":false,"excerpt":"SBCCI 2018 31st Symposium on Integrated Circuits and Systems Design Bento Gon\u00e7alves - Rio Grande do Sul - Brazil - August 27 to 31, 2018 SBCCI is an international forum dedicated to integrated circuits and systems design, test and electronic design automation (EDA), held annually in Brazil. The 31th SBCCI\u2026","rel":"","context":"Post similar","block_context":{"text":"Post similar","link":""},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]}],"_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/pages\/772","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/users\/685"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/comments?post=772"}],"version-history":[{"count":10,"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/pages\/772\/revisions"}],"predecessor-version":[{"id":1511,"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/pages\/772\/revisions\/1511"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/chipinthepampa2018\/wp-json\/wp\/v2\/media?parent=772"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}