{"id":26,"date":"2016-08-22T15:19:50","date_gmt":"2016-08-22T18:19:50","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/agostini\/?page_id=26"},"modified":"2024-05-06T20:01:57","modified_gmt":"2024-05-06T23:01:57","slug":"principais-publicacoes","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/agostini\/principais-publicacoes\/","title":{"rendered":"Principais Publica\u00e7\u00f5es"},"content":{"rendered":"<p style=\"text-align: right;\"><em>*** Atualizado em 6 de maio de 2024 ***<\/em><\/p>\n<p>A seguir est\u00e1 apresentada uma lista com as minhas publica\u00e7\u00f5es\u00a0principais. Meu <a href=\"http:\/\/lattes.cnpq.br\/9604735363839730\">Curr\u00edculo Lattes <\/a>apresenta a lista completa dos meus trabalhos publicados.<\/p>\n<p><strong>Teses Defendidas e Publicadas:<\/strong><\/p>\n<ul>\n<li style=\"text-align: justify;\">AGOSTINI, Luciano.<a href=\"http:\/\/hdl.handle.net\/10183\/12425\"> Desenvolvimento de Arquiteturas de Alto Desempenho Dedicadas \u00e0 Compress\u00e3o de V\u00eddeo Segundo o Padr\u00e3o H.264\/AVC<\/a>. 2007. Tese (Doutorado em Computa\u00e7\u00e3o) &#8211; Universidade Federal do Rio Grande do Sul. Orientador: Sergio Bampi.<\/li>\n<li style=\"text-align: justify;\">AGOSTINI, Luciano. <a href=\"http:\/\/hdl.handle.net\/10183\/11431\">Projeto de Arquiteturas Integradas para a Compress\u00e3o de Imagens JPEG<\/a>. 2002. Disserta\u00e7\u00e3o (Mestrado em Computa\u00e7\u00e3o) &#8211; Universidade Federal do Rio Grande do Sul. Orientador: Sergio Bampi.<\/li>\n<\/ul>\n<p><strong>Livros Publicados:<\/strong><\/p>\n<ul>\n<li><span style=\"font-family: 'Helvetica Neue', Helvetica, Arial, 'Nimbus Sans L', sans-serif;\">SALDANHA, M.<\/span><span style=\"font-family: 'Helvetica Neue', Helvetica, Arial, 'Nimbus Sans L', sans-serif;\">;\u00a0<\/span><span style=\"font-family: 'Helvetica Neue', Helvetica, Arial, 'Nimbus Sans L', sans-serif;\">SANCHEZ, G.<\/span><span style=\"font-family: 'Helvetica Neue', Helvetica, Arial, 'Nimbus Sans L', sans-serif;\">; MARCON, C.; <\/span>AGOSTINI, L. <span style=\"font-family: 'Helvetica Neue', Helvetica, Arial, 'Nimbus Sans L', sans-serif;\"><a href=\"http:\/\/dx.doi.org\/10.1007\/978-3-031-11640-7\">Versatile Video Coding (VVC) &#8211; Machine Learning and Heuristics<\/a>. 1. ed. Springer Nature, 2022. v. 1. 123p .<\/span><\/li>\n<li>SANCHEZ, G.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1007\/978-3-030-25927-3\">Algorithms for Efficient and Fast 3D-HEVC Depth Map Encoding<\/a>. 1. ed. Cham: Springer International Publishing, 2020. 83p.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/978-3-319-25778-5\">Complexity-Aware High Efficiency Video Coding<\/a>. 1. ed. Berlin: Springer International Publishing, 2016. v. 1. 225p.<\/li>\n<\/ul>\n<p><strong>Cap\u00edtulos de Livros Publicados:<\/strong><\/p>\n<ul>\n<li>AFONSO, V.;\u00a0SALDANHA, M.;\u00a0CONCEICAO, R.; PERLEBERG, M.; PORTO, M.;\u00a0ZATT, B.;\u00a0SUSIN, A.; AGOSTINI, L.\u00a0<a href=\"http:\/\/dx.doi.org\/10.1049\/PBCS053E_ch6\">Real-time architectures for 3D video coding<\/a>. In: Maurizio Martina. (Org.). VLSI Architectures for Future Video Coding. 1ed.: Institution of Engineering and Technology, 2019, v. , p. 191-226.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/978-3-319-06704-9_24\">Computational Resource Management for Video Coding in Mobile Environments<\/a>. In: Constandinos X. Mavromoustakis; Evangelos Pallis; George Mastorakis. (Org.). Modeling and Optimization in Science and Technologies. 1ed.Berlin: Springer International Publishing, 2014, v. 3, p. 515-549.<\/li>\n<\/ul>\n<p><strong>Artigos Publicados em Peri\u00f3dicos:<\/strong><\/p>\n<ul>\n<li>GOEBEL, J.; AGOSTINI, L.; ZATT, B.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/TVLSI.2023.3239388\">A High-Throughput Hardware Design for the AV1 Decoder Intraprediction<\/a>. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 99, p. 1-14, 2023.<\/li>\n<li>CORR\u00caA, M.; PALOMINO, D.; CORR\u00caA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/MDAT.2023.3286335\">Heuristic-based Algorithms for Low-Complexity AV1 Intra Prediction<\/a>. Ieee Design &amp; Test, v. 99, p. 1-1, 2023.<\/li>\n<li>BENDER, I.; BORGES, A.; AGOSTINI, L.; ZATT, B.; CORREA, G.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-023-01308-5\">Complexity and compression efficiency analysis of libaom AV1 video codec<\/a>. Journal of Real-Time Image Processing, v. 20, p. 50, 2023.<\/li>\n<li>GONCALVES, P.; AGOSTINI, L.; CORR\u00caA, G.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11042-022-13094-6\">Learning-based Bypass Zone Search Algorithm for Fast Motion Estimation<\/a>. MULTIMEDIA TOOLS AND APPLICATIONS, v. 99, p. 1-15, 2022.<\/li>\n<li>NETO, L.; CORREA, M.; PALOMINO, D.; AGOSTINI, L.; CORREA, G. <a href=\"http:\/\/dx.doi.org\/10.1109\/mdat.2022.3146083\">Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction<\/a>. IEEE Design &amp; Test, v. 39, p. 38-45, 2022.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2021.3108671\">Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 32, p. 3947-3960, 2022.<\/li>\n<li>STORCH, I.; AGOSTINI, L.; ZATT, B.; BAMPI, S.; PALOMINO, D. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2021.3096752\">FastInter360: A Fast Inter Mode Decision for HEVC 360 Video Coding<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 32, p. 3235-3249, 2022.<\/li>\n<li>PERLEBERG, M.; AFONSO, V.; BORGES, V.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-022-01238-8\">Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction<\/a>. Journal of Real-Time Image Processing, v. 19, p. 969-984, 2022.<\/li>\n<li>PORTO, R.; PERLEBERG, M.; AFONSO, V.; ZATT, B.; ROMA, N.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-020-01014-6\">Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing<\/a>. Journal of Real-Time Image Processing, v. 18, p. 723-737, 2021.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1016\/j.jvcir.2021.103202\">Performance analysis of VVC intra coding<\/a>. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 79, p. 103202, 2021.<\/li>\n<li>CORREA, M.; SALDANHA, M.; BORGES, A.; CORREA, G.; PALOMINO, D.; PORTO, M.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ojcas.2021.3107254\">AV1 and VVC Video Codecs: Overview on Complexity Reduction and Hardware Design<\/a>. IEEE Open Journal of Circuits and Systems, v. 2, p. 564-576, 2021.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1117\/1.jei.30.5.053009\">Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard<\/a>. JOURNAL OF ELECTRONIC IMAGING, v. 30, p. 053009-1-053009-17, 2021.<\/li>\n<li>SILVEIRA, D.; AMARAL, L.; POVALA, G.; ZATT, B.; AGOSTINI, L.; PORTO, M.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-021-01138-3\">Low-energy motion estimation memory system with dynamic management<\/a>. Journal of Real-Time Image Processing, v. 18, p. 2495-2510, 2021.<\/li>\n<li>FERNANDES, R.; SANCHEZ, G.; CATALDO, R.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1016\/j.jvcir.2021.103291\">Using curved angular intra-frame prediction to improve video coding efficiency<\/a>. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 80, p. 103291, 2021.<\/li>\n<li>BORGES, V.; PERLEBERG, M.; AFONSO, V.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/s10470-021-01911-1\">Hardware and coding efficiency assessment of 3D-HEVC DIS tool using alternative similarity criteria<\/a>. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 108, p. 555-568, 2021.<\/li>\n<li>SANCHEZ, G.; SALDANHA, M.; FERNANDES, R.; CATALDO, R.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSI.2019.2929977\">3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ONLINE), v. 67, p. 415-427, 2020.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2019.2898122\">Fast 3D-HEVC Depth Map Encoding Using Machine Learning<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 30, p. 850-861, 2020.<\/li>\n<li>CORREA, M.; WASKOW, B.; GOEBEL, J.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsi.2020.2973031\">A High-Throughput Hardware Architecture for AV1 Non-Directional Intra Modes<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 67, p. 1481-1494, 2020.<\/li>\n<li>PERLEBERG, M.; BORGES, V.; AFONSO, V.; PALOMINO, D.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSII.2020.2983959\">6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design<\/a>. IEEE Transactions on Circuits and Systems II: Express Briefs, v. 67, p. 836-840, 2020. Cita\u00e7\u00f5es:1|1<\/li>\n<li>SALDANHA, M; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsi.2020.2977297\">Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 67, p. 1704-1714, 2020.<\/li>\n<li>PERLEBERG, M.; SUSIN, A.; AFONSO, V.; AGOSTINI, L.; ZATT, B.; PORTO, M.; CONCEICAO, R. <a href=\"http:\/\/dx.doi.org\/10.1109\/MDAT.2019.2932938\">High-Throughput Hardware Design for 3D-HEVC Disparity Estimation<\/a>. IEEE Design &amp; Test, v. 37, p. 22-29, 2020.<\/li>\n<li>UCKER, M.; AFONSO, V.; SALDANHA, M.; AUDIBERT, L.; CONCEICAO, R.; SUSIN, A.; PORTO, M.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/MDAT.2019.2952344\">High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction<\/a>. IEEE Design &amp; Test, v. 37, p. 7-14, 2020.<\/li>\n<li>SANCHEZ, G.; FERNANDES, R.; CATALDO, R.; AGOSTINI, L.; SOUSA, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1109\/mdat.2019.2952342\">Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction<\/a>. IEEE Design &amp; Test, v. 37, p. 15-21, 2020.<\/li>\n<li>SANCHEZ, G.; AGOSTINI, L.; SOUSA, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-018-0819-3\">Parallelism exploration for 3D high-efficiency video coding depth modeling mode one<\/a>. Journal of Real-Time Image Processing, v. 17, p. 787-797, 2020.<\/li>\n<li>PORTO, R.; CORREA, M.; GOEBEL, J.; ZATT, B.; ROMA, N.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-019-00934-2\">UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders<\/a>. Journal of Real-Time Image Processing, v. 17, p. 1685-1701, 2020.<\/li>\n<li>STORCH, I.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-019-00900-y\">Speedup evaluation of HEVC parallel video coding using Tiles<\/a>. Journal of Real-Time Image Processing, v. 17, p. 1469-1486, 2020.<\/li>\n<li>SALDANHA, M.; CONCEI\u00c7\u00c3O, R.; AFONSO, V.; AVILA, G.; SUSIN, A.; PORTO, M.; ZATT, B.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11042-020-09257-y\">Complexity and compression efficiency assessment of 3D-HEVC encoder<\/a>. MULTIMEDIA TOOLS AND APPLICATIONS (DORDRECHT. ONLINE), v. 79, p. 25723-25746, 2020.<\/li>\n<li>DOMANSKI, R.; GOEBEL, J.; PENNY, W.; PORTO, M.; PALOMINO, D.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSII.2019.2909705\">High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v. 66, p. 883-887, 2019.<\/li>\n<li>PENNY, W.; GOEBEL, J.; PAIM, G.; PORTO, M.; AGOSTINI, L.; ZATT, B. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-018-0832-6\">High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator<\/a>. Journal of Real-Time Image Processing, v. 16, p. 175-192, 2019.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-015-0551-1\">Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design<\/a>. Journal of Real-Time Image Processing, v. 16, p. 391-411, 2019.<\/li>\n<li>SEIDEL, I.; MONTEIRO, M.; BONOTTO, B.; AGOSTINI, L.; GUNTZEL, J. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSI.2019.2900004\">Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, v. 66, p. 2102-2115, 2019.<\/li>\n<li>BUBOLZ, T.; CONCEICAO, R.; GRELLERT, M.; AGOSTINI, L.; ZATT, B.; CORREA, G. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSI.2019.2903978\">Quality and Energy-Aware HEVC Transrating Based on Machine Learning<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, v. 66, p. 2124-2136, 2019.<\/li>\n<li>SANCHEZ, G.; SILVEIRA, J.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1109\/TCSVT.2018.2865645\">Performance Analysis of Depth Intra-Coding in 3D-HEVC<\/a>. IEEE Transactions on Circuits and Systems for Video Technology, v. 29, p. 2509-2520, 2019.<\/li>\n<li>SANCHEZ, G.; SALDANHA, M.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11760-019-01450-3\">Analysis of parallel encoding using tiles in 3D High Efficiency Video Coding<\/a>. Signal Image and Video Processing, v. 13, p. 1079-1086, 2019.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. <a href=\"http:\/\/dx.doi.org\/10.1117\/1.jei.27.1.010502\">Block-level fast coding scheme for depth maps in three-dimensional high efficiency video coding<\/a>. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-4, 2018.<\/li>\n<li>SANCHEZ, G. ; MARCON, CESAR ; AGOSTINI, L. V. . <a href=\"http:\/\/dx.doi.org\/10.1117\/1.jei.27.1.013025\">Exploration of depth modeling mode one lossless wedgelets storage strategies for 3D-high efficiency video coding<\/a>. JOURNAL OF ELECTRONIC IMAGING, v. 27, p. 1-12, 2018.<\/li>\n<li>SANCHEZ, G. ; AGOSTINI, L. V. ; MARCON, C\u00c9SAR . <a href=\"http:\/\/dx.doi.org\/10.1016\/j.jvcir.2018.05.003\">A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction<\/a>. JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION, v. 54, p. 193-203, 2018.<\/li>\n<li>AFONSO, V.; CONCEICAO, R.; SALDANHA, M.; BRAATZ, LUCIANO; PERLEBERG, M.; CORR\u00caA, G.; PORTO, MARCELO; AGOSTINI, L. V.; ZATT, Bruno; SUSIN, A. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2018.2847633\">Energy-Aware Motion and Disparity Estimation System for 3D-HEVC with Run-Time Adaptive Memory Hierarchy<\/a>. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v. 99, p. 1-10, 2018.<\/li>\n<li>SILVEIRA, DIEISON; ZATT, Bruno; AGOSTINI, L.; PORTO, Marcelo. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-014-0443-9\">Reference frame context-adaptive variable-length coder: a real-time hardware-friendly approach for lossless external memory bandwidth reduction in current video-coding systems<\/a>. Journal of Real-Time Image Processing, v. 14, p. 249-265, 2018.<\/li>\n<li>SANCHEZ, G.; MARCON, C.; AGOSTINI, L.<a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-016-0609-8\"> Real-time scalable hardware architecture for 3D-HEVC bipartition modes<\/a>. Journal of Real-Time Image Processing, v. 13, p. 71-83, 2017.<\/li>\n<li>SALDANHA, M\u00c1RIO ; SANCHEZ, GUSTAVO ; ZATT, Bruno ; PORTO, Marcelo ; Agostini, Luciano . <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-016-0597-8\">Energy-aware scheme for the 3D-HEVC depth maps prediction<\/a>. Journal of Real-Time Image Processing, v. 13, p. 55-69, 2017.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2015.2469533\">Pareto-Based Method for High Efficiency Video Coding with Limited Encoding Time<\/a>. IEEE Transactions on Circuits and Systems for Video Technology, v. 26, p. 1734-1745, 2016.<\/li>\n<li>SILVA, T.; AGOSTINI, L.; CRUZ, L.<a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-015-0533-3\"> Fast intra prediction algorithm based on texture analysis for 3D-HEVC encoders<\/a>. Journal of Real-Time Image Processing, v. 12, p. 357-368, 2016.<\/li>\n<li>CORREA, G.; AGOSTINI, L.; ASSUNCAO, P.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-013-0392-8\">Complexity scalability for real-time HEVC encoders<\/a>. Journal of Real-Time Image Processing, v. 12, p. 107-122, 2016.<\/li>\n<li>SANCHEZ, G.; JORDANI, L.; MARCON, C.; AGOSTINI, L. V. <a href=\"https:\/\/www.spiedigitallibrary.org\/journals\/Journal-of-Electronic-Imaging\/volume-25\/issue-6\/063011\/DFPS--a-fast-pattern-selector-for-depth-modeling-mode\/10.1117\/1.JEI.25.6.063011.short?SSO=1\">DFPS: A Fast Pattern Selector for Depth Modeling Mode 1 in Three-Dimensional High-Efficiency Video Coding Standard<\/a>. Journal of Electronic Imaging (Print), v. 25, p. 063011, 2016.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. <a href=\"https:\/\/link.springer.com\/article\/10.1007%2Fs10470-016-0719-z\">Fast coding tree structure decision for HEVC based on classification trees<\/a>. Analog Integrated Circuits and Signal Processing, v. 1, p. 1-11, 2016.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L.<a href=\"http:\/\/dx.doi.org\/10.1109\/TCSVT.2014.2363753\"> Fast HEVC Encoding Decisions Using Data Mining<\/a>. IEEE Transactions on Circuits and Systems for Video Technology, v. 25, p. 660-673, 2015.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11554-015-0551-1\">Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design<\/a>. Journal of Real-Time Image Processing, v. sv, p. 1-21, 2015.<\/li>\n<li>SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1007\/s10470-014-0342-9\">Hardware-friendly HEVC motion estimation: new algorithms and efficient VLSI designs targeting high definition videos<\/a>. Analog Integrated Circuits and Signal Processing, v. 82, p. 135-146, 2014.<\/li>\n<li>AGOSTINI, L.; PORTO, M.; CRISTANI, C.; OGLIO, P.; SILVA, M.; MATOS, J.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1007\/s11042-012-1033-0\">Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos<\/a>. Multimedia Tools and Applications, v. 63, p. 107-127, 2013.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. P<a href=\"http:\/\/dx.doi.org\/10.1109\/tcsvt.2012.2223411\">erformance and Computational Complexity Assessment of High-Efficiency Video Encoders<\/a>. IEEE Transactions on Circuits and Systems for Video Technology (Print), v. 22, p. 1899-1909, 2012.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; CRUZ, L.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/tce.2011.6131165\">Complexity control of high efficiency video encoders for power-constrained devices<\/a>. IEEE Transactions on Consumer Electronics, v. 57, p. 1866-1874, 2011.<\/li>\n<li>AGOSTINI, L.; SILVA, I.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1016\/j.micpro.2006.02.002\">Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs<\/a>. Microprocessors and Microsystems, v. 31, p. 487-497, 2007.<\/li>\n<li>AGOSTINI, L.; SILVA, I.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1016\/j.microrel.2003.10.016\">Parallel color space converters for JPEG image compression<\/a>. Microelectronics and Reliability, Inglaterra, v. 44, n.4, p. 697-703, 2004.<\/li>\n<\/ul>\n<p><strong>Trabalhos\u00a0Publicados em Anais de Eventos:<\/strong><\/p>\n<ul>\n<li>GOEBEL, J.; AGOSTINI, L.; ZATT, B.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas46773.2023.10181828\">High-Throughput Design for a Multi-Size DCT-II Targeting the AV1 Encoder<\/a>. In: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, Monterey. Piscataway: IEEE, 2023. p. 1-5.<\/li>\n<li>SAGRILO, F.; LOOSE, M.; VIANA, R.; SANCHEZ, G.; CORR\u00caA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas46773.2023.10181659\">Learning-Based Fast VVC Affine Motion Estimation<\/a>. In: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, Monterey. Piscataway: IEEE, 2023. p. 1-5.<\/li>\n<li>DOMANSKI, R.; KOLODZIEJSKI, W.; PENNY, W.; PORTO, M.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/icip49359.2023.10222657\">High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation<\/a>. In: 2023 IEEE International Conference on Image Processing (ICIP), 2023, Kuala Lumpur. Piscataway: IEEE, 2023. p. 2680-5.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS48785.2022.9938000\">Fast Transform Decision Scheme for VVC Intra-Frame Prediction Using Decision Trees<\/a>. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1948-1952.<\/li>\n<li>DUARTE, A.; GONCALVES, P.; AGOSTINI, L.; ZATT, B.; CORREA, G.; PORTO, M.; PALOMINO, D. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS48785.2022.9937973\">Fast Affine Motion Estimation for VVC using Machine-Learning-Based Early Search Termination<\/a>. In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1-5.<\/li>\n<li>GOEBEL, J.; COSTA, V.; AGOSTINI, L.; ZATT, B.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS48785.2022.9937597\">A High-Throughput Design for the H.266\/VVC Low-Frequency Non-Separable Transform.<\/a> In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1798-1802.<\/li>\n<li>CORREA, M.; ROMA, N.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS48785.2022.9937507\">Mode-Adaptive Subsampling of SAD\/SSE Operations for Intra Prediction Cost Reduction.<\/a> In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, Austin. Piscataway: IEEE, 2022. p. 1808-1812.<\/li>\n<li>ROSA, P.; PALOMINO, D.; PORTO, M.; AGOSTINI, L. GM-RF: <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP46576.2022.9897488\">An Av1 Intra-Frame Fast Decision Based On Random Forest<\/a>. In: 2022 IEEE International Conference on Image Processing (ICIP), 2022, Bordeaux. Piscataway: IEEE, 2022. p. 1-5.<\/li>\n<li>CORREA, G.; DALL&#8217;OGLIO, P.; PALOMINO, D.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.23919\/Eusipco47968.2020.9287223\">Fast Block Size Decision for HEVC Encoders with On-the-Fly Trained Classifiers.<\/a> In: 2020 28th European Signal Processing Conference (EUSIPCO), 2021, Amsterdam. Piscataway: IEEE, 2021. p. 540-544.<\/li>\n<li>STORCH, I.; CORREA, G.; ZATT, B.; AGOSTINI, L.; PALOMINO, D. <a href=\"http:\/\/dx.doi.org\/10.23919\/eusipco47968.2020.9287774\">ESA360 &#8211; Early SKIP Mode Decision Algorithm for Fast ERP 360 Video Coding<\/a>. In: 2020 28th European Signal Processing Conference (EUSIPCO), 2021, Amsterdam. Piscataway: IEEE, 2021. p. 535-539.<\/li>\n<li>DOMANSKI, R.; KOLODZIEJSKI, W.; CORREA, G.; PORTO, M.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS51556.2021.9401224\">Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation<\/a>. In: 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, Daegu. 2021. p. 1-5.<\/li>\n<li>STORCH, I.; ZATT, B.; AGOSTINI, L.; CORREA, G.; CRUZ, L.; PALOMINO, D. <a href=\"http:\/\/dx.doi.org\/10.1109\/icassp40776.2020.9053374\">Spatially Adaptive Intra Mode Pre-Selection for ERP 360 Video Coding<\/a>. In: ICASSP 2020 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2020, Barcelona. Piscataway: IEEE, 2020. p. 2178-2182.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS45731.2020.9180980\">Fast Partitioning Decision Scheme for Versatile Video Coding Intra-Frame Prediction<\/a>. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla.\u00a0 Piscataway: IEEE, 2020. p. 1-5.<\/li>\n<li>ZUMMACH, E.; PALAU, R.; GOEBEL, J.; PALOMINO, D.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas45731.2020.9180525\">Efficient Hardware Design for the AV1 CDEF Filter Targeting 4K UHD Videos.<\/a> In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.<\/li>\n<li>PENNY, W.; CORREA, G.; AGOSTINI, L.; PALOMINO, D.; PORTO, M.; NAZAR, G.; ZATT, B. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas45731.2020.9180976\">Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC<\/a>. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.<\/li>\n<li>CORREA, M.; NETO, L.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas45731.2020.9180526\">ASIC Solution for the Directional Intra Prediction of the AV1 Encoder Targeting UHD 4K Videos<\/a>. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Sevilla. Piscataway: IEEE, 2020. p. 1-5.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas45731.2020.9180526\">Complexity Analysis Of VVC Intra Coding<\/a>. In: 2020 IEEE International Conference on Image Processing (ICIP), 2020, Abu Dhabi. Piscataway: IEEE, 2020. p. 3119-3123.<\/li>\n<li>CERVEIRA, A.; AGOSTINI, L.; ZATT, B.; SAMPAIO, F. <a href=\"http:\/\/dx.doi.org\/10.1109\/icip40778.2020.9191358\">Memory Assessment Of Versatile Video Coding.<\/a> In: 2020 IEEE International Conference on Image Processing (ICIP), 2020, Abu Dhabi. Piscataway: IEEE, 2020. p. 1186-1190.<\/li>\n<li>CORREA, M.; WASKOW, B.; ZATT, B.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas.2019.8702258\">High Throughput Hardware Design for AV1 Paeth and Smooth Intra Modes<\/a>. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, Sapporo. Piscataway: IEEE, 2019. p. 1-5.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; ZATT, B.; MARCON, C.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas.2019.8702475\">TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding<\/a>. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, Sapporo. Piscataway: IEEE, 2019. p. 1-5.<\/li>\n<li>GONCALVES, M.; AGOSTINI, L.; PALOMINO, D.; PORTO, M.; CORREA, G. <a href=\"http:\/\/dx.doi.org\/10.1109\/icip.2019.8803524\">Encoding Efficiency and Computational Cost Assessment of State-Of-The-Art Point Cloud Codecs<\/a>. In: 2019 IEEE International Conference on Image Processing (ICIP), 2019, Taipei. Piscataway: IEEE, 2019. p. 3726-3730.<\/li>\n<li>BORGES, A.; ZATT, B.; PORTO, M.; AGOSTINI, L.; CORREA, G. <a href=\"http:\/\/dx.doi.org\/10.23919\/EUSIPCO.2019.8902565\">Complexity Scalable HEVC-to-AV1 Transcoding Based on Coding Tree Depth Inheritance<\/a>. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.<\/li>\n<li>CORREA, M.; ZATT, B.; PALOMINO, D.; CORREA, G.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.23919\/EUSIPCO.2019.8903093\">A Fast Local Mode Decision for the HEVC Intra Prediction Based on Direction Detection<\/a>. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.<\/li>\n<li>BENDER, I.; PALOMINO, D.; AGOSTINI, L.; CORREA, G.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.23919\/EUSIPCO.2019.8903006\">Compression Efficiency and Computational Cost Comparison between AV1 and HEVC Encoders<\/a>. In: 2019 27th European Signal Processing Conference (EUSIPCO), 2019, A Corunha. Piscataway: IEEE, 2019. p. 1-5.<\/li>\n<li>SANCHEZ, G.; FERNANDES, R.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2018.8451620\">DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm<\/a>. In: 2018 25th IEEE International Conference on Image Processing (ICIP), 2018, Athens. Piscataway: IEEE, 2018. p. 1782-1787.<\/li>\n<li>CONCEICAO, R.; PORTO, M.; ZATT, B.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/icip.2018.8451345\">LF-CAE: Context-Adaptive Encoding for Lenslet Light Fields Using HEVC<\/a>. In: 2018 25th IEEE International Conference on Image Processing (ICIP), 2018, Athens. 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In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Florence. Piscataway: IEEE, 2018. p. 1-5.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; MARCON, CESAR; AGOSTINI, L. V. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICASSP.2018.8462283\">Fast 3D-HEVC Depth Maps Intra-Frame Prediction Using Data Mining<\/a>. In: ICASSP 2018 &#8211; 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. Piscataway: IEEE, 2018. p. 1-5.<\/li>\n<li>GONCALVES, P.; PORTO, MARCELO; ZATT, Bruno; AGOSTINI, L. V.; CORR\u00caA, G. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICASSP.2018.8462580\">Octagonal-Axis Raster Pattern for Improved Test Zone Search Motion Estimation<\/a>. In: ICASSP 2018 &#8211; 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2018, Calgary. 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In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.<\/li>\n<li>BRAATZ, L.; AGOSTINI, L.; ZATT, B.; PORTO, M. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/8050704\/\">A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding<\/a>. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Baltimore. Piscataway: IEEE, 2017. p. 1-4.<\/li>\n<li>SANCHEZ, G.; SALDANHA, M.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/8081362\/\">Depth modeling modes complexity control system for the 3D-HEVC video encoder<\/a>. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1021-1060.<\/li>\n<li>AVILA, G.; CONCEICAO, R.; BUBOLZ, T.; ZATT, B.; PORTO, M.; AGOSTINI, L.; CORREA, G. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/8081364\/\">Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification<\/a>. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1031-1070.<\/li>\n<li>SANCHEZ, G.; SALDANHA, M.; ZATT, B.; PORTO, M.; AGOSTINI, L.; MARCON, C. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/8081464\/\">Edge-aware depth motion estimation a complexity reduction scheme for 3D-HEVC<\/a>. In: 2017 25th European Signal Processing Conference (EUSIPCO), 2017, Kos. Piscataway: IEEE, 2017. p. 1524-1573.<\/li>\n<li>PENNY, W.; MACHADO, I.; PORTO, M.; AGOSTINI, L.; ZATT, B. <a href=\"http:\/\/ieeexplore.ieee.org\/document\/7532470\/\">Pareto-based energy control for the HEVC encoder<\/a>. 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In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 1114-1117.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M.<a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS.2015.7168765\"> A real-time architecture for reference frame compression for high definition video coders<\/a>. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 842-845.<\/li>\n<li>SALDANHA, M.; SANCHEZ, G.; ZATT, B.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS.2015.7168710\">Complexity reduction for the 3D-HEVC depth maps coding<\/a>. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, Lisbon. p. 621-624.<\/li>\n<li>MAICH, H.; PAIM, G.; AFONSO, V.; AGOSTINI, L.; ZATT, B.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/icip.2015.7351335\">A multi-standard interpolation hardware solution for H.264 and HEVC<\/a>. In: 2015 IEEE International Conference on Image Processing (ICIP), 2015, Quebec City. p. 2910-2914.<\/li>\n<li>SILVA, T.; AGOSTINI, L.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/icme.2015.7177511\">Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction<\/a>. In: 2015 IEEE International Conference on Multimedia and Expo (ICME), 2015, Turin. p. 1-6.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICASSP.2014.6855029\">A low-complexity and lossless reference frame encoder algorithm for video coding<\/a>. In: ICASSP 2014 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2014, Florence. p. 7358-7362.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS.2014.6865711\">Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding<\/a>. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 2624-2627.<\/li>\n<li>CONCEICAO, R.; SOUZA, J.; JESKE, R.; PORTO, M.; ZATT, B.; AGOSTINI, L.<a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS.2014.6865537\"> Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders<\/a>. In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne VIC. p. 1925-1928.<\/li>\n<li>SANCHEZ, G.; SALDANHA, M.; BALOTA, GABRIEL ; ZATT, B.; PORTO, M.; AGOSTINI, L.<a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2014.7025649\"> Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm<\/a>. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 3209-3213.<\/li>\n<li>SILVEIRA, D.; POVALA, G.; AMARAL, L.; ZATT, B.; AGOSTINI, L.; PORTO, M. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2014.7026141\">A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders<\/a>. In: 2014 IEEE International Conference on Image Processing (ICIP), 2014, Paris. p. 5641-5645.<\/li>\n<li>SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; BAMPI, S.; HENKEL, J.<a href=\"http:\/\/dx.doi.org\/10.7873\/DATE.2013.144\"> Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding<\/a>. In: Design Automation and Test in Europe, 2013, Grenoble. New Jersey: IEEE Conference Publications. p. 665-670.<\/li>\n<li>SAMPAIO, F.; ZATT, B.; SHAFIQUE, M.; AGOSTINI, L.; HENKEL, J.; BAMPI, S.<a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2013.6738377\"> Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding<\/a>. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1831-1835.<\/li>\n<li>GRELLERT, M.; SHAFIQUE, M.; KHAN, M.; AGOSTINI, L.; MATTOS, J.; HENKEL, J. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2013.6738381\">An adaptive workload management scheme for HEVC encoding<\/a>. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1850-1854.<\/li>\n<li>SANCHEZ, G.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2013.6738410\">A hardware friendly motion estimation algorithm for the emergent HEVC standard and its low power hardware design<\/a>. In: 2013 20th IEEE International Conference on Image Processing (ICIP), 2013, Melbourne. p. 1991-1994.<\/li>\n<li>SILVEIRA, D.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2013.6607434\">A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture<\/a>. In: ICME 2013 &#8211; IEEE International Conference on Multimedia and Expo, 2013, San Jose. Piscatway: IEEE, 2013. p. 1-6.<\/li>\n<li>SANCHEZ, G.; AGOSTINI, L.; SAMPAIO, F.; PORTO, M.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2012.53\">Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design<\/a>. In: ICME 2012 &#8211; IEEE International Conference on Multimedia &amp; Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 1079-1084.<\/li>\n<li>SAMPAIO, F.; BAMPI, S.; SILVA, M.; AGOSTINI, L.; MATOS, J. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2012.37\">Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter\u2010Prediction of HEVC Encoders<\/a>. In: ICME 2012 &#8211; IEEE International Conference on Multimedia &amp; Expo, 2012, Melbourne. Los Alamitos: IEEE, 2012. p. 657-662.<\/li>\n<li>CORREA, G.; ASSUNCAO, P.; AGOSTINI, L.; CRUZ, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2012.6466834\">Motion compensated tree depth limitation for complexity control of HEVC encoding<\/a>. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 217-220.<\/li>\n<li>PALOMINO, D.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; SUSIN, A. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2012.6466830\">A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard<\/a>. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 201-204.<\/li>\n<li>VIANNA, H.; SANCHEZ, G.; PORTO, M.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2012.6466827\">High performance hardware architectures for the inverse Rotational Transform of the emerging HEVC standard<\/a>. In: 2012 19th IEEE International Conference on Image Processing (ICIP 2012), 2012, Orlando. p. 189-192.<\/li>\n<li>SILVA, M.; SAMPAIO, F.; MATOS, J.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ISCAS.2011.5937632\">A Multilevel Data Reuse Scheme for Motion Estimation and Its VLSI Design<\/a>. In: ISCAS 2011 &#8211; IEEE International Symposium on Circuits and Systems, 2011, Rio de Janeiro. New York: IEEE, 2011. p. 583-586.<\/li>\n<li>ZATT, B.; MUHAMMAD, S.; SAMPAIO, F.; AGOSTINI, L.; BAMPI, S.; HENKEL, J. <a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/articleDetails.jsp?arnumber=5982023\">Run-Time Adaptive Energy-Aware Motion and Disparity Estimation in Multiview Video Coding<\/a>. In: DAC2011 &#8211; 48th Design Automation Conference, 2011, San Diego. Piscataway: IEEE, 2011. p. 1026-1031.<\/li>\n<li>CORR\u00caA, G.; PALOMINO, D.; DINIZ, C.; AGOSTINI, L.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2011.6012097\">SHBS: A Heuristic for Fast Inter Mode Decision of H.264\/AVC Standard Targeting VLSI Design<\/a>. In: ICME 2011 &#8211; IEEE International Conference on Multimedia &amp; Expo, 2011, Barcelona. Piscataway: IEEE, 2011. p. 1-4.<\/li>\n<li>DINIZ, C.; ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2009.5202700\">A Real Time H.264\/AVC Intra Frame Prediction Hardware Architecture for HDTV 1080P Videos<\/a>. In: 2009 IEEE International Conference on Multimedia and Expo, 2009, New York. Piscataway: IEEE, 2009. p. 1138-1141.<\/li>\n<li>PALOMINO, D.; SAMPAIO, F.; DORNELLES, R.; AGOSTINI, L. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICIP.2009.5414106\">Low Latency and High Throughput Dedicated Loop of Transforms and Quantization Focusing in the H.264\/AVC Intra Prediction<\/a>. In: IEEE ICIP 2009 &#8211; IEEE International Conference on Image Processing, 2009, Cairo. Piscataway: IEEE, 2009. p. 2697-2700.<\/li>\n<li>PORTO, M. ; AGOSTINI, L.; BAMPI, S.; SUSIN, A. <a href=\"http:\/\/dx.doi.org\/10.1109\/ICME.2008.4607614\">A High Throughput and Low Cost Diamond Search Architecture for HDTV Motion Estimation<\/a>. In: ICME2008 &#8211; IEEE International Conference on Multimedia &amp; Expo, 2008, Hannover. Piscataway: IEEE, 2008. p. 1033-1036.<\/li>\n<li>ZATT, B.; AGOSTINI, L.; SUSIN, A.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas.2008.4541345\">HP422-MoCHA: A H.264\/AVC High Profile Motion Compensation Architecture for HDTV<\/a>. In: ISCAS2008 &#8211; 2008 IEEE International Symposium on Circuits and Systems, 2008, Seattle. Piscataway: IEEE, 2008. p. 25-28.<\/li>\n<li>AZEVEDO, A.; ZATT, B.; AGOSTINI, L.; BAMPI, S. <a href=\"http:\/\/dx.doi.org\/10.1109\/iscas.2007.378828\">MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264\/AVC Decoder Targeting HDTV<\/a>. In: ISCAS 2007 &#8211; IEEE International Symposium on Circuits and Systems, 2007, New Orleans. Piscataway: IEEE, 2007. p. 1617-1620.<\/li>\n<li>AGOSTINI, L.; PORTO, R.; G\u00dcNTZEL, J.; SILVA, I.; BAMPI, S.<a href=\"http:\/\/dx.doi.org\/10.1109\/iscas.2006.1693859\"> High Throughput Multitransform and Multiparallelism IP for the H.264\/AVC Video Compression Standard<\/a>. In: ISCAS 2006 &#8211; IEEE International Symposium on Circuits and Systems, 2006, Ilha de Kos. Piscataway: IEEE, 2006. p. 5417-5422.<\/li>\n<li>AGOSTINI, L.; AZEVEDO, A.; ROSA, V.; BERRIEL, E.; SANTOS, T.; BAMPI, S.; SUSIN, A. <a href=\"http:\/\/dx.doi.org\/10.1109\/fpl.2006.311258\">FPGA Design of a H.264\/AVC Main Profile Decoder for HDTV<\/a>. In: FPL 2006 &#8211; 16th IEEE International Conference on Field Programmable Logic and Applications, 2006, Madri. Piscataway: IEEE, 2006. p. 501-506.<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>*** Atualizado em 6 de maio de 2024 *** A seguir est\u00e1 apresentada uma lista com as minhas publica\u00e7\u00f5es\u00a0principais. Meu Curr\u00edculo Lattes apresenta a lista completa dos meus trabalhos publicados. Teses Defendidas e Publicadas: AGOSTINI, Luciano. Desenvolvimento de Arquiteturas de &hellip; <a href=\"https:\/\/wp.ufpel.edu.br\/agostini\/principais-publicacoes\/\">Continue lendo <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":685,"featured_media":0,"parent":0,"menu_order":2,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-26","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/users\/685"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/comments?post=26"}],"version-history":[{"count":15,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26\/revisions"}],"predecessor-version":[{"id":334,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26\/revisions\/334"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/media?parent=26"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}