{"id":26,"date":"2016-08-22T15:19:50","date_gmt":"2016-08-22T18:19:50","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/agostini\/?page_id=26"},"modified":"2026-07-29T17:01:17","modified_gmt":"2026-07-29T20:01:17","slug":"principais-publicacoes","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/agostini\/principais-publicacoes\/","title":{"rendered":"Principais Publica\u00e7\u00f5es"},"content":{"rendered":"
\n
\n

Publica\u00e7\u00f5es<\/h1>\n

Produ\u00e7\u00e3o bibliogr\u00e1fica organizada por ano e, dentro de cada ano, por tipo de publica\u00e7\u00e3o. Os t\u00edtulos s\u00e3o apresentados em sua forma oficial, e o nome de Luciano Volcan Agostini aparece em destaque nas listas de autores.<\/p>\n

\n
112<\/strong>Artigos em peri\u00f3dicos<\/span><\/div>\n
404<\/strong>Trabalhos em eventos<\/span><\/div>\n
8<\/strong>Livros<\/span><\/div>\n
6<\/strong>Cap\u00edtulos<\/span><\/div>\n
4<\/strong>Patentes<\/span><\/div>\n
98<\/strong>Pr\u00eamios e t\u00edtulos<\/span><\/div>\n<\/div>\n
Fonte: Curr\u00edculo Lattes atualizado em 29\/07\/2026.<\/div>\n<\/section>\n
\n

Publica\u00e7\u00f5es por ano<\/h2>\n
Os anos est\u00e3o apresentados em ordem decrescente. Dentro de cada ano, as publica\u00e7\u00f5es s\u00e3o separadas em artigos em peri\u00f3dicos, trabalhos em eventos, livros, cap\u00edtulos de livros e patentes, quando houver registros.<\/div>\n
\n2026 (10 publica\u00e7\u00f5es)<\/span><\/summary>\n
\n

Artigos em peri\u00f3dicos (4)<\/span><\/h3>\n
    \n
  1. \n
    Quantitative assessment of inter-frame prediction in versatile video coding standard<\/div>\n
    Loose, Marta; Viana, Ramiro; Sanchez, Gustavo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
    MULTIMEDIA TOOLS AND APPLICATIONS (DORDRECHT. ONLINE) \u00b7 2026 \u00b7 v. 85, p. 1 DOI: 10.1007\/s11042-026-21236-3<\/a><\/span><\/div>\n<\/li>\n
  2. \n
    On the Impact of Quantization Precision and Calibration Settings Applied to the SSF Neural Video Decoder<\/div>\n
    Concei\u00e7\u00e3o, Ruhan; Peng, Wen-Hsiao; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
    JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2026 \u00b7 v. 21, p. 1\u201310 DOI: 10.29292\/jics.v21i1.1086<\/a><\/span><\/div>\n<\/li>\n
  3. \n
    Accelerating Versatile Video Coding via Decision-Tree-Based Fast Affine Motion Estimation<\/div>\n
    Viana, Ramiro; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
    JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2026 \u00b7 v. 21, p. 1\u201311 DOI: 10.29292\/jics.v21i1.1033<\/a><\/span><\/div>\n<\/li>\n
  4. \n
    A Coding-Efficiency Analysis of HEVC Encoder Embedded in High-End Mobile Chipsets<\/div>\n
    Costa, V\u00edtor; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
    JOURNAL OF THE BRAZILIAN COMPUTER SOCIETY (ONLINE) \u00b7 2026 \u00b7 v. 32, p. 13\u201325 DOI: 10.5753\/jbcs.2026.5354<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

    Trabalhos em eventos (6)<\/span><\/h3>\n
      \n
    1. \n
      Hardware-Friendly Machine-Learning-Based Fast AV1 Overlapped Block Motion Compensation<\/div>\n
      Kolodziejski, William; Braga, Leonardo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
      2026 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2026 \u00b7 Shanghai, p. 3231\u20133235 DOI: 10.1109\/ISCAS66217.2026.11562381<\/a><\/span><\/div>\n<\/li>\n
    2. \n
      FastMIP-360: A Lightweight Decision Tree for Pruning VVC MIP in 360\u00b0 Videos<\/div>\n
      Oliveira, Franklin; Cassanta, Rog\u00e9rio; Storch, Iago; Agostini, Luciano<\/strong><\/div>\n
      2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS) \u00b7 2026 \u00b7 Arequipa, p. 01\u20135 DOI: 10.1109\/LASCAS67804.2026.11457076<\/a><\/span><\/div>\n<\/li>\n
    3. \n
      Energy-Efficient Neural Video Coding via a High-Throughput Hardware Design for Pointwise Convolution and LUT-based WSiLU<\/div>\n
      Maass, Denis; Aldrighi, Vanessa; Concei\u00e7\u00e2o, Ruhan; Peng, Wen-Hsiao; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
      2026 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2026 \u00b7 Shanghai, p. 3221\u20133225 DOI: 10.1109\/iscas66217.2026.11562238<\/a><\/span><\/div>\n<\/li>\n
    4. \n
      Assessing the Domain Gap: Evaluation of STDF for Enhancing Videos Compressed by Neural Codecs<\/div>\n
      Tavares, Leandro; Concei\u00e7\u00e3o, Ruhan; Peng, Wen-Hsiao; Agostini, Luciano<\/strong>; Porto, Marcelo; Corr\u00eaa, Guilherme<\/div>\n
      2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS) \u00b7 2026 \u00b7 Arequipa, p. 1\u20135 DOI: 10.1109\/lascas67804.2026.11457158<\/a><\/span><\/div>\n<\/li>\n
    5. \n
      A Rate-Distortion-Complexity Analysis of Neural Video CODECs<\/div>\n
      De Queiroz, Ricardo L.; Garcia, Diogo C.; Chen, Yi-Hsin; Concei\u00e7\u00e3o, Ruhan; Peng, Wen-Hsiao; Agostini, Luciano V.<\/strong><\/div>\n
      2026 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2026 \u00b7 Shanghai, p. 4237\u20134241 DOI: 10.1109\/iscas66217.2026.11562090<\/a><\/span><\/div>\n<\/li>\n
    6. \n
      A FHD@30fps Hardware Design for WSiLU Activation Function for Neural Video Coding<\/div>\n
      Aldrighi, Vanessa; Maass, Denis; Concei\u00e7\u00e3o, Ruhan; Peng, Wen-Hsiao; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
      2026 IEEE 17th Latin America Symposium on Circuits and System (LASCAS) \u00b7 2026 \u00b7 Arequipa, p. 1\u20135 DOI: 10.1109\/lascas67804.2026.11457129<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
      \n2025 (26 publica\u00e7\u00f5es)<\/span><\/summary>\n
      \n

      Artigos em peri\u00f3dicos (6)<\/span><\/h3>\n
        \n
      1. \n
        Hardware Architecture Design for Power-Efficient Motion Estimation over Compressed Block Data<\/div>\n
        Costa, V\u00edtor; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
        JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2025 \u00b7 v. 20, p. 1\u201310 DOI: 10.29292\/jics.v20i1.964<\/a><\/span><\/div>\n<\/li>\n
      2. \n
        FastGW: A Machine Learning-Based Early Skip for the AV1 Global Warped Motion Compensation<\/div>\n
        Kolodziejski, William; Domanski, Robson; Agostini, Luciano<\/strong><\/div>\n
        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS \u00b7 2025 \u00b7 v. 72, p. 977\u2013988 DOI: 10.1109\/tcsi.2024.3486243<\/a><\/span><\/div>\n<\/li>\n
      3. \n
        DM-FIFS: A Dual-Model Machine-Learning Method for Fast Interpolation Filter Search in AV1 Encoding<\/div>\n
        Kolodziejski, William; Braga, Leonardo; Rezende, Marcelo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS \u00b7 2025 \u00b7 v. 73, p. 1\u201313 DOI: 10.1109\/tcsi.2025.3624335<\/a><\/span><\/div>\n<\/li>\n
      4. \n
        An Efficient Hardware Design for the VVC Prediction Refinement with Optical Flow<\/div>\n
        Perleberg, Murilo; Mu\u00f1oz, Marcello; Maass, Denis; Afonso, Vladimir; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
        Ieee Design & Test \u00b7 2025 \u00b7 v. 99, p. 1\u20131 DOI: 10.1109\/MDAT.2025.3545385<\/a><\/span><\/div>\n<\/li>\n
      5. \n
        A Real-Time Hardware for LES Solving and deltaMV Calculation in VVC Affine Prediction<\/div>\n
        Maass, Denis; Mu\u00f1oz, Marcello; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
        IEEE Design & Test \u00b7 2025 \u00b7 v. 43, p. 1\u20131 DOI: 10.1109\/mdat.2025.3586004<\/a><\/span><\/div>\n<\/li>\n
      6. \n
        A Coding Efficiency-Aware Hardware Design for VVC Affine Motion Estimation Reconstructor<\/div>\n
        Mu\u00f1oz, Marcello M.; Maass, Denis; Perleberg, Murilo; Agostini, Luciano<\/strong>; Corr\u00eaa, Guilherme; Porto, Marcelo<\/div>\n
        IEEE Design & Test \u00b7 2025 \u00b7 v. 99, p. 1\u20131 DOI: 10.1109\/mdat.2025.3551896<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

        Trabalhos em eventos (19)<\/span><\/h3>\n
          \n
        1. \n
          Traditional vs. Neural Video Codecs: Compression Efficiency, Visual Artifacts, and Quality Analysis Beyond PSNR<\/div>\n
          Tavares, Leandro; Concei\u00e7\u00e3o, Ruhan; Costa, Victor; Agostini, Luciano<\/strong>; Porto, Marcelo; Corr\u00eaa, Guilherme<\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 446\u2013454 DOI: 10.5753\/webmedia.2025.16011<\/a><\/span><\/div>\n<\/li>\n
        2. \n
          Real-Time UHD 4K Hardware Design for the Gradient-Based Search of the VVC Affine ME<\/div>\n
          Mu\u00f1oz, Marcello M.; Maass, Denis; Perleberg, Murilo; Agostini, Luciano<\/strong>; Corr\u00eaa, Guilherme; Porto, Marcelo<\/div>\n
          2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2025 \u00b7 Manaus, p. 1\u20135 DOI: 10.1109\/sbcci66862.2025.11218275<\/a><\/span><\/div>\n<\/li>\n
        3. \n
          Platform-Independent Hardware Design for Low-Power Neural Video Hyperprior Decoding<\/div>\n
          Concei\u00e7\u00e3o, Ruhan; Maass, Denis; Aldrighi, Vanessa; Peng, Wen-Hsiao; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
          2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2025 \u00b7 Manaus, p. 1\u20135 DOI: 10.1109\/SBCCI66862.2025.11218655<\/a><\/span><\/div>\n<\/li>\n
        4. \n
          Hardware Design for VVC Angular Intra Prediction Modes with Coding Efficiency Awareness<\/div>\n
          Borges, Vinicius; Perleberg, Murilo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
          2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2025 \u00b7 Bento Gon\u00e7alves, p. 1\u20135 DOI: 10.1109\/LASCAS64004.2025.10966271<\/a><\/span><\/div>\n<\/li>\n
        5. \n
          Fast VVC Test Zone Search and Affine Motion Estimation Using Machine Learning<\/div>\n
          Viana, Ramiro; Loose, Marta; Concei\u00e7\u00e3o, Ruhan; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
          2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2025 \u00b7 Bento Gon\u00e7alves, p. 1\u20135 DOI: 10.1109\/LASCAS64004.2025.10966296<\/a><\/span><\/div>\n<\/li>\n
        6. \n
          Fast VVC Angular Intra-Prediction for 360\u00b0 Videos Based on Decision Trees<\/div>\n
          Viana, Ramiro; Storch, Iago; Rosado, Rog\u00e9rio; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 550\u2013554 DOI: 10.5753\/webmedia.2025.16075<\/a><\/span><\/div>\n<\/li>\n
        7. \n
          Fast VVC Affine Motion Estimation Using a Hardware-Friendly Machine Learning Method<\/div>\n
          Viana, Ramiro; Loose, Marta; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
          2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2025 \u00b7 Manaus, p. 1\u20135 DOI: 10.1109\/sbcci66862.2025.11218687<\/a><\/span><\/div>\n<\/li>\n
        8. \n
          Fast Heuristic for VVC Intra-frame Prediction Targeting 360\u00b0 Video Formats<\/div>\n
          Rosado, Rog\u00e9rio; Santos, Ot\u00e1vio; De Oliveira, Franklin; Silva, Lucas; Aldrighi, Vanessa; Storch, Iago; Sanchez, Gustavo; Palomino, Daniel; Agostini, Luciano<\/strong><\/div>\n
          2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2025 \u00b7 Bento Gon\u00e7alves, p. 1\u20135 DOI: 10.1109\/LASCAS64004.2025.10966322<\/a><\/span><\/div>\n<\/li>\n
        9. \n
          Fast AV1 LocalWarped Motion Compensation Using Machine Learning<\/div>\n
          Kolodziejski, William; Braga, Leonardo; Rezende, Marcelo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 545\u2013549 DOI: 10.5753\/webmedia.2025.14161<\/a><\/span><\/div>\n<\/li>\n
        10. \n
          FIFS: A Machine Learning-Based Fast AV1 Interpolation Filter Search<\/div>\n
          Kolodziejski, William; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
          2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2025 \u00b7 Bento Gon\u00e7alves, p. 1\u20135 DOI: 10.1109\/LASCAS64004.2025.10966280<\/a><\/span><\/div>\n<\/li>\n
        11. \n
          Evaluation of Tile-based Parallelism in VVC Encoders for 360-degree Videos<\/div>\n
          Beltr\u00e3o, \u00c9ric; Storch, Iago; Agostini, Luciano<\/strong>; Zatt, Bruno; Palomino, Daniel<\/div>\n
          Semin\u00e1rio Integrado de Software e Hardware \u00b7 2025 \u00b7 Brasil, p. 157\u2013168 DOI: 10.5753\/semish.2025.8119<\/a><\/span><\/div>\n<\/li>\n
        12. \n
          Energy-Efficient Hardware Architecture for VVC TZS Using Approximate Subtractors<\/div>\n
          Ferreira, Rafael; Agostini, Luciano<\/strong>; Diniz, Cl\u00e1udio M.; Zatt, Bruno<\/div>\n
          2025 IEEE 16th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2025 \u00b7 Bento Gon\u00e7alves, p. 1\u20135 DOI: 10.1109\/LASCAS64004.2025.10966352<\/a><\/span><\/div>\n<\/li>\n
        13. \n
          Efficient Hardware Design for Compressed Blocks SAD Calculation in VVC Motion Estimation<\/div>\n
          Costa, V\u00edtor; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
          2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2025 \u00b7 Manaus, p. 1\u20135 DOI: 10.1109\/SBCCI66862.2025.11218658<\/a><\/span><\/div>\n<\/li>\n
        14. \n
          Cross-Platform Neural Video Coding: A Case Study<\/div>\n
          Concei\u00e7\u00e3o, Ruhan; Porto, Marcelo; Peng, Wen-Hsiao; Agostini, Luciano<\/strong><\/div>\n
          2025 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2025 \u00b7 London, p. 1\u20135 DOI: 10.1109\/ISCAS56072.2025.11043556<\/a><\/span><\/div>\n<\/li>\n
        15. \n
          An\u00e1lise da Efici\u00eancia de Compress\u00e3o do Codificador HEVC Embarcado no Smartphone Samsung Galaxy S23 Plus<\/div>\n
          Costa, V\u00edtor; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 516\u2013520 DOI: 10.5753\/webmedia.2025.16013<\/a><\/span><\/div>\n<\/li>\n
        16. \n
          A Power-Efficient Architecture for LES Solving and \u00bfMV Calculation of VVC Affine Prediction<\/div>\n
          Maass, Denis; Munoz, Marcello; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
          2025 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2025 \u00b7 London, p. 1\u20135 DOI: 10.1109\/ISCAS56072.2025.11044021<\/a><\/span><\/div>\n<\/li>\n
        17. \n
          A Lightweight I3D-Based Approach for Real-Time Brazilian Sign Language Recognition<\/div>\n
          Costa, Victor; Tavares, Leandro; Concei\u00e7\u00e3o, Ruhan; Agostini, Luciano<\/strong>; Santana, Brenda Salenave; Lebedeff, Tatiana Bolivar; Corr\u00eaa, Guilherme<\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 501\u2013505 DOI: 10.5753\/webmedia.2025.16072<\/a><\/span><\/div>\n<\/li>\n
        18. \n
          A Hardware Architecture for Smoothing Filters in H.266\/VVC Intra-Prediction<\/div>\n
          Henssler, Sara Vit\u00f3ria; Agostini, Luciano Volcan<\/strong>; Corr\u00eaa, Marcel Moscarelli<\/div>\n
          Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2025 \u00b7 Brasil, p. 496\u2013500 DOI: 10.5753\/webmedia.2025.15379<\/a><\/span><\/div>\n<\/li>\n
        19. \n
          A Fast and Hardware-Friendly CTB-Based Approach for VVC Affine Motion Estimation<\/div>\n
          Maass, Denis; Mu\u00f1oz, Marcello; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
          2025 International Conference on Visual Communications and Image Processing (VCIP) \u00b7 2025 \u00b7 Klagenfurt, p. 1\u20135 DOI: 10.1109\/vcip67698.2025.11396814<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

          Livros publicados ou organizados (1)<\/span><\/h3>\n
            \n
          1. \n
            Hardware Design for 3D Video Coding – Energy-efficient and High-throughput Architectures for Multiview Plus Depth Video Content<\/div>\n
            Afonso, V.; Perleberg, M.; Zatt, B.; Porto, M.; Agostini, L. V.<\/strong>; Susin, A.<\/div>\n
            Springer Cham \u00b7 2025 \u00b7 ISBN 9783031802317, 218 p\u00e1ginas DOI: 10.1007\/978-3-031-80232-4<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
            \n2024 (10 publica\u00e7\u00f5es)<\/span><\/summary>\n
            \n

            Artigos em peri\u00f3dicos (2)<\/span><\/h3>\n
              \n
            1. \n
              Memory-Centered Motion Estimation System With CTB-Based Full-Splitting Algorithm<\/div>\n
              Perleberg, Murilo R.; Afonso, Vladimir; Agostini, Luciano Volcan<\/strong>; Zatt, Bruno; Porto, Marcelo Schiavon<\/div>\n
              IEEE TRANSACTIONS ON CONSUMER ELECTRONICS \u00b7 2024 \u00b7 v. 70, p. 5007\u20135019 DOI: 10.1109\/tce.2024.3399123<\/a><\/span><\/div>\n<\/li>\n
            2. \n
              Adaptive complexity control for AV1 video encoder using machine learning<\/div>\n
              Bender, Isis; Rehbein, Gustavo; Correa, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
              Journal of Real-Time Image Processing \u00b7 2024 \u00b7 v. 21, p. 96 DOI: 10.1007\/s11554-024-01463-3<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

              Trabalhos em eventos (8)<\/span><\/h3>\n
                \n
              1. \n
                Speeding Up the AV1 Global Warped Motion Compensation<\/div>\n
                Kolodziejski, William; Domanski, Robson; Agostini, Luciano<\/strong><\/div>\n
                2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2024 \u00b7 Punta del Este, p. 1\u20135 DOI: 10.1109\/LASCAS60203.2024.10506160<\/a><\/span><\/div>\n<\/li>\n
              2. \n
                High-Throughput Hardware Design for the Complete VVC Angular Intra Prediction<\/div>\n
                Borges, Vinicius; Perleberg, Murilo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2024 \u00b7 Nancy, p. 1\u20135 DOI: 10.1109\/icecs61496.2024.10848892<\/a><\/span><\/div>\n<\/li>\n
              3. \n
                Coding Efficiency and Time Evaluation of Apple A15 Bionic Chipset HEVC Encoder<\/div>\n
                Costa, V\u00edtor; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2024 \u00b7 Punta del Este, p. 1\u20135 DOI: 10.1109\/lascas60203.2024.10506151<\/a><\/span><\/div>\n<\/li>\n
              4. \n
                Bit-Width Optimized Transposition Buffer Design for the AV1 2D-DCT Transform<\/div>\n
                Rodrigues, Jelson; G\u00f6ebel, Jones; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                2024 37th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2024 \u00b7 Joao Pessoa, p. 1\u20135 DOI: 10.1109\/SBCCI62366.2024.10704001<\/a><\/span><\/div>\n<\/li>\n
              5. \n
                A Real-Time UHD 4K Hardware for VVC Affine Linear Equation System Solving<\/div>\n
                Maass, Denis; Munoz, Marcello; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                2024 37th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2024 \u00b7 Joao Pessoa, p. 1\u20135 DOI: 10.1109\/SBCCI62366.2024.10703992<\/a><\/span><\/div>\n<\/li>\n
              6. \n
                A Hardware-Friendly Fast VVC Test Zone Search Algorithm Using Machine Learning<\/div>\n
                Viana, Ramiro; Sagrilo, Fernando; Ferreira, Rafael; Loose, Marta; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2024 \u00b7 Punta del Este, p. 1\u20135 DOI: 10.1109\/lascas60203.2024.10506120<\/a><\/span><\/div>\n<\/li>\n
              7. \n
                A Hardware-Friendly Acceleration of VVC Affine Motion Estimation Using Decision Trees<\/div>\n
                Viana, Ramiro; Loose, Marta; Ferreira, Rafael; Porto, Marcelo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                2024 37th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2024 \u00b7 Joao Pessoa, p. 1\u20135 DOI: 10.1109\/sbcci62366.2024.10703987<\/a><\/span><\/div>\n<\/li>\n
              8. \n
                A Coding-Efficiency-Aware Fast Heuristic for VVC Intra-Frame Prediction Targeting 360\u00b0 Videos<\/div>\n
                Rosado, Rog\u00e9rio; Santos, Ot\u00e1vio; Oliveira, Franklin; Silva, Lucas; Sanchez, Gustavo; Storch, Iago; Palomino, Daniel; Agostini, Luciano<\/strong><\/div>\n
                Proceedings of the Brazilian Symposium on Multimedia and the Web \u00b7 2024 \u00b7 Brasil, p. 355\u2013360 DOI: 10.5753\/webmedia.2024.243128<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                \n2023 (15 publica\u00e7\u00f5es)<\/span><\/summary>\n
                \n

                Artigos em peri\u00f3dicos (6)<\/span><\/h3>\n
                  \n
                1. \n
                  Learning-based bypass zone search algorithm for fast motion estimation<\/div>\n
                  Goncalves, Paulo; Correa, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                  MULTIMEDIA TOOLS AND APPLICATIONS \u00b7 2023 \u00b7 v. 82, p. 3535\u20133560 DOI: 10.1007\/s11042-022-13094-6<\/a><\/span><\/div>\n<\/li>\n
                2. \n
                  High-Throughput Hardware Design for the AV1 Decoder Switchable Loop Restoration Filters<\/div>\n
                  Palau, Roberta; Penny, W.; Viana, Ramiro; Goebel, J.; Porto, M.; Corr\u00eaa, G.; Agostini, L. V.<\/strong><\/div>\n
                  JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2023 \u00b7 v. 18, p. 1\u201312 DOI: 10.29292\/jics.v18i1.667<\/a><\/span><\/div>\n<\/li>\n
                3. \n
                  Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction<\/div>\n
                  Corr\u00eaa, Marcel; Palomino, Daniel; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                  IEEE Design & Test \u00b7 2023 \u00b7 v. 40, p. 26\u201333 DOI: 10.1109\/mdat.2023.3286335<\/a><\/span><\/div>\n<\/li>\n
                4. \n
                  Efficient Dedicated Hardware Design System for the VVC Low-Frequency Non-Separable Transform<\/div>\n
                  Goebel, J.; Agostini, L. V.<\/strong>; Zatt, B.; Porto, M.<\/div>\n
                  JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2023 \u00b7 v. 18, p. 1\u201311 DOI: 10.29292\/jics.v18i1.668<\/a><\/span><\/div>\n<\/li>\n
                5. \n
                  Complexity and compression efficiency analysis of libaom AV1 video codec<\/div>\n
                  Bender, Isis; Borges, Alex; Agostini, Luciano<\/strong>; Zatt, Bruno; Correa, Guilherme; Porto, Marcelo<\/div>\n
                  Journal of Real-Time Image Processing \u00b7 2023 \u00b7 v. 20, p. 50 DOI: 10.1007\/s11554-023-01308-5<\/a><\/span><\/div>\n<\/li>\n
                6. \n
                  A High-Throughput Hardware Design for the AV1 Decoder Intraprediction<\/div>\n
                  Goebel, Jones William; Agostini, Luciano Volcan<\/strong>; Zatt, Bruno; Porto, Marcelo Schiavon<\/div>\n
                  IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS \u00b7 2023 \u00b7 v. 31, p. 498\u2013511 DOI: 10.1109\/tvlsi.2023.3239388<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                  Trabalhos em eventos (9)<\/span><\/h3>\n
                    \n
                  1. \n
                    Learning-Based Fast VVC Affine Motion Estimation<\/div>\n
                    Sagrilo, Fernando; Loose, Marta; Viana, Ramiro; Sanchez, Gustavo; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                    2023 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2023 \u00b7 Monterey, p. 1\u20135 DOI: 10.1109\/iscas46773.2023.10181659<\/a><\/span><\/div>\n<\/li>\n
                  2. \n
                    High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation<\/div>\n
                    Domanski, Robson; Kolodziejski, William; Penny, Wagner; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                    2023 IEEE International Conference on Image Processing (ICIP) \u00b7 2023 \u00b7 Kuala Lumpur, p. 2680\u20135 DOI: 10.1109\/icip49359.2023.10222657<\/a><\/span><\/div>\n<\/li>\n
                  3. \n
                    High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation<\/div>\n
                    Domanski, Robson; Kolodziejski, William; Penny, Wagner; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                    2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2023 \u00b7 Quito, p. 1\u20135 DOI: 10.1109\/LASCAS56464.2023.10108378<\/a><\/span><\/div>\n<\/li>\n
                  4. \n
                    High-Throughput Design for a Multi-Size DCT-II Targeting the AV1 Encoder<\/div>\n
                    Goebel, Jones; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                    2023 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2023 \u00b7 Monterey, p. 1\u20135 DOI: 10.1109\/iscas46773.2023.10181828<\/a><\/span><\/div>\n<\/li>\n
                  5. \n
                    Hardware Design for the Affine Motion Compensation of the VVC Standard<\/div>\n
                    Mu\u00f1oz, Marcello M.; Maass, Denis; Perleberg, Murilo; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                    2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2023 \u00b7 Quito, p. 1\u20135 DOI: 10.1109\/LASCAS56464.2023.10108350<\/a><\/span><\/div>\n<\/li>\n
                  6. \n
                    Evaluation of Imprecise Subtractors into Test Zone Search for VVC Encoding<\/div>\n
                    Ferreira, Rafael; Agostini, Luciano<\/strong>; Diniz, Cl\u00e1udio M.; Zatt, Bruno<\/div>\n
                    2023 36th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2023 \u00b7 Rio de Janeiro, p. 1\u20136 DOI: 10.1109\/sbcci60457.2023.10261956<\/a><\/span><\/div>\n<\/li>\n
                  7. \n
                    Efficient Architecture for VVC Angular Intra Prediction based on a Hardware-Friendly Heuristic<\/div>\n
                    Borges, Vinicius; Perleberg, Murilo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                    2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS) \u00b7 2023 \u00b7 Quito, p. 1\u20135 DOI: 10.1109\/LASCAS56464.2023.10108393<\/a><\/span><\/div>\n<\/li>\n
                  8. \n
                    An UHD 4K@120fps Hardware for the VVC Prediction Refinement with Optical Flow<\/div>\n
                    Perleberg, Murilo; Mu\u00f1oz, Marcello M.; Maass, Denis; Afonso, Vladimir; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                    2023 36th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2023 \u00b7 Rio de Janeiro, p. 1\u20136 DOI: 10.1109\/sbcci60457.2023.10261950<\/a><\/span><\/div>\n<\/li>\n
                  9. \n
                    4K UHD@60fps Design For The VVC Affine Motion Estimation Reconstructor<\/div>\n
                    Mu\u00f1oz, Marcello M.; Maass, Denis; Perleberg, Murilo; Agostini, Luciano<\/strong>; Correa, Guilherme; Porto, Marcelo<\/div>\n
                    2023 36th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2023 \u00b7 Rio de Janeiro, p. 1\u20136 DOI: 10.1109\/sbcci60457.2023.10261659<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                    \n2022 (19 publica\u00e7\u00f5es)<\/span><\/summary>\n
                    \n

                    Artigos em peri\u00f3dicos (5)<\/span><\/h3>\n
                      \n
                    1. \n
                      Ultra-High Definition AV1 FME Interpolation Architectures Exploring Approximate Computing<\/div>\n
                      Kolodziejski, William; Domanski, R. A.; Porto, M.; Zatt, B.; Agostini, L. V.<\/strong><\/div>\n
                      JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2022 \u00b7 v. 17, p. 1\u201312 DOI: 10.29292\/jics.v17i2.558<\/a><\/span><\/div>\n<\/li>\n
                    2. \n
                      Quality-power configurable flexible coding order hardware design for real-time 3D-HEVC intra-frame prediction<\/div>\n
                      Perleberg, Murilo R.; Afonso, Vladimir; Borges, Vinicius A.; Zatt, Bruno; Agostini, Luciano V.<\/strong>; Porto, Marcelo<\/div>\n
                      Journal of Real-Time Image Processing \u00b7 2022 \u00b7 v. 19, p. 969\u2013984 DOI: 10.1007\/s11554-022-01238-8<\/a><\/span><\/div>\n<\/li>\n
                    3. \n
                      Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction<\/div>\n
                      Neto, Luiz; Correa, Marcel; Palomino, Daniel; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                      Ieee Design & Test \u00b7 2022 \u00b7 v. 39, p. 38\u201345 DOI: 10.1109\/MDAT.2022.3146083<\/a><\/span><\/div>\n<\/li>\n
                    4. \n
                      FastInter360: A Fast Inter Mode Decision for HEVC 360 Video Coding<\/div>\n
                      Storch, Iago; Agostini, Luciano<\/strong>; Zatt, Bruno; Bampi, Sergio; Palomino, Daniel<\/div>\n
                      IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2022 \u00b7 v. 32, p. 3235\u20133249 DOI: 10.1109\/tcsvt.2021.3096752<\/a><\/span><\/div>\n<\/li>\n
                    5. \n
                      Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine<\/div>\n
                      Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                      IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2022 \u00b7 v. 32, p. 3947\u20133960 DOI: 10.1109\/tcsvt.2021.3108671<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                      Trabalhos em eventos (13)<\/span><\/h3>\n
                        \n
                      1. \n
                        VVC Interpicture Prediction Using SAD with Imprecise Subtractors: A Quantitative Analysis<\/div>\n
                        Ferreira, Rafael; Santos, Lucas; Agostini, Luciano<\/strong>; Diniz, Claudio M.; Zatt, Bruno<\/div>\n
                        2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2022 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/ICECS202256217.2022.9971128<\/a><\/span><\/div>\n<\/li>\n
                      2. \n
                        Multi-Objective optimized Complexity Control for the AV1 Video Encoder<\/div>\n
                        Rehbein, Gustavo; Bender, Isis; Correa, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                        2022 Picture Coding Symposium (PCS) \u00b7 2022 \u00b7 San Jose, p. 259\u2013263 DOI: 10.1109\/pcs56426.2022.10018004<\/a><\/span><\/div>\n<\/li>\n
                      3. \n
                        Mode-Adaptive Subsampling of SAD\/SSE Operations for Intra Prediction Cost Reduction<\/div>\n
                        Correa, Marcel; Roma, Nuno; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                        2022 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2022 \u00b7 Austin, p. 1808\u20131812 DOI: 10.1109\/ISCAS48785.2022.9937507<\/a><\/span><\/div>\n<\/li>\n
                      4. \n
                        Low-Frequency Non-Separable Transform Hardware System Design for the VVC Encoder<\/div>\n
                        Goebel, Jones; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                        2022 35th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2022 \u00b7 Porto Alegre, p. 1\u20136 DOI: 10.1109\/SBCCI55532.2022.9893228<\/a><\/span><\/div>\n<\/li>\n
                      5. \n
                        Hardware Design for the Separable Symmetric Normalized Wiener Filter of the AV1 Decoder<\/div>\n
                        Palau, Roberta; Penny, Wagner; Goebel, Jones; Zummach, Eduardo; Correa, Guilherme; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                        2022 35th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2022 \u00b7 Porto Alegre, p. 1\u20136 DOI: 10.1109\/SBCCI55532.2022.9893219<\/a><\/span><\/div>\n<\/li>\n
                      6. \n
                        GM-RF: An Av1 Intra-Frame Fast Decision Based On Random Forest<\/div>\n
                        Rosa, P.; Palomino, D. M.; Porto, M.; Agostini, L. V.<\/strong><\/div>\n
                        2022 IEEE International Conference on Image Processing (ICIP) \u00b7 2022 \u00b7 Bordeaux, p. 1\u20135 DOI: 10.1109\/ICIP46576.2022.9897488<\/a><\/span><\/div>\n<\/li>\n
                      7. \n
                        Fast Transform Decision Scheme for VVC Intra-Frame Prediction Using Decision Trees<\/div>\n
                        Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                        2022 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2022 \u00b7 Austin, p. 1948\u20131952 DOI: 10.1109\/ISCAS48785.2022.9938000<\/a><\/span><\/div>\n<\/li>\n
                      8. \n
                        Fast Affine Motion Estimation for VVC using Machine-Learning-Based Early Search Termination<\/div>\n
                        Duarte, Adson; Goncalves, Paulo; Agostini, Luciano<\/strong>; Zatt, Bruno; Correa, Guilherme; Porto, Marcelo; Palomino, Daniel<\/div>\n
                        2022 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2022 \u00b7 Austin, p. 1\u20135 DOI: 10.1109\/ISCAS48785.2022.9937973<\/a><\/span><\/div>\n<\/li>\n
                      9. \n
                        Direction-Based Fast Mode Decision and Hardware Design for the AV1 Intra Prediction<\/div>\n
                        Correa, Marcel; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                        2022 35th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2022 \u00b7 Porto Alegre, p. 1\u20136 DOI: 10.1109\/SBCCI55532.2022.9893253<\/a><\/span><\/div>\n<\/li>\n
                      10. \n
                        An UHD 4K@60fps Dual Self-Guided Filter Targeting the AV1 Decoder<\/div>\n
                        Palau, Roberta; Goebel, Jones; Zummach, Eduardo; Viana, Ramiro; Correa, Marcel; Correa, Guilherme; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                        2022 35th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2022 \u00b7 Porto Alegre, p. 1\u20136 DOI: 10.1109\/SBCCI55532.2022.9893236<\/a><\/span><\/div>\n<\/li>\n
                      11. \n
                        A Learning-Based Framework for Depth Perception using Dense Light Fields<\/div>\n
                        Ferrugem, Anderson Priebe; Zatt, Bruno; Agostini, Luciano Volcan<\/strong><\/div>\n
                        WebMedia &apos;22: Brazilian Symposium on Multimedia and Web \u00b7 2022 \u00b7 Curitiba Brazil, p. 150\u2013158 DOI: 10.1145\/3539637.3557062<\/a><\/span><\/div>\n<\/li>\n
                      12. \n
                        A High-Throughput Design for the H.266\/VVC Low-Frequency Non-Separable Transform<\/div>\n
                        Goebel, Jones; Costa, Vitor; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                        2022 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2022 \u00b7 Austin, p. 1798\u20131802 DOI: 10.1109\/ISCAS48785.2022.9937597<\/a><\/span><\/div>\n<\/li>\n
                      13. \n
                        A Hardware-Friendly and Configurable Heuristic Targeting VVC Inter-Frame Prediction<\/div>\n
                        Loose, Marta; Viana, Ramiro; Sagrilo, Fernando; Sanchez, Gustavo; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                        2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2022 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/ICECS202256217.2022.9971081<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                        Livros publicados ou organizados (1)<\/span><\/h3>\n
                          \n
                        1. \n
                          Versatile Video Coding (VVC) – Machine Learning and Heuristics<\/div>\n
                          Saldanha, M.; Sanchez, G.; Marcon, C\u00e9sar; Agostini, L. V.<\/strong><\/div>\n
                          Springer Nature \u00b7 2022 \u00b7 ISBN 9783031116391, 123 p\u00e1ginas DOI: 10.1007\/978-3-031-11640-7<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                          \n2021 (17 publica\u00e7\u00f5es)<\/span><\/summary>\n
                          \n

                          Artigos em peri\u00f3dicos (8)<\/span><\/h3>\n
                            \n
                          1. \n
                            Using curved angular intra-frame prediction to improve video coding efficiency<\/div>\n
                            Fernandes, Ramon; Sanchez, Gustavo; Cataldo, Rodrigo; Agostini, Luciano<\/strong>; Marcon, C\u00e9sar<\/div>\n
                            JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION \u00b7 2021 \u00b7 v. 80, p. 103291 DOI: 10.1016\/j.jvcir.2021.103291<\/a><\/span><\/div>\n<\/li>\n
                          2. \n
                            Performance analysis of VVC intra coding<\/div>\n
                            Saldanha, M\u00e1rio; Sanchez, Gustavo; Marcon, C\u00e9sar; Agostini, Luciano<\/strong><\/div>\n
                            JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION \u00b7 2021 \u00b7 v. 79, p. 103202 DOI: 10.1016\/j.jvcir.2021.103202<\/a><\/span><\/div>\n<\/li>\n
                          3. \n
                            Modern Video Coding: Methods, Challenges and Systems<\/div>\n
                            Palau, R. C. N.; Silveira, B.; Domanski, R. A.; Loose, M. B.; Cerveira, Arthur; Sampaio, Felipe; Palomino, D. M.; Porto, Marcelo; Corr\u00eaa, G.; Agostini, L. V.<\/strong><\/div>\n
                            JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2021 \u00b7 v. 16, p. 1\u201312 DOI: 10.29292\/jics.v16i2.503<\/a><\/span><\/div>\n<\/li>\n
                          4. \n
                            Low-energy motion estimation memory system with dynamic management<\/div>\n
                            Silveira, Dieison Soares; Amaral, L\u00edvia; Povala, Guilherme; Zatt, Bruno; Agostini, Luciano Volcan<\/strong>; Porto, Marcelo Schiavon; Bampi, Sergio<\/div>\n
                            Journal of Real-Time Image Processing \u00b7 2021 \u00b7 v. 18, p. 2495\u20132510 DOI: 10.1007\/s11554-021-01138-3<\/a><\/span><\/div>\n<\/li>\n
                          5. \n
                            Hardware and coding efficiency assessment of 3D-HEVC DIS tool using alternative similarity criteria<\/div>\n
                            Borges, Vinicius A.; Perleberg, Murilo R.; Afonso, Vladimir; Porto, Marcelo S.; Agostini, Luciano V.<\/strong><\/div>\n
                            ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING \u00b7 2021 \u00b7 v. 108, p. 555\u2013568 DOI: 10.1007\/s10470-021-01911-1<\/a><\/span><\/div>\n<\/li>\n
                          6. \n
                            Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard<\/div>\n
                            Saldanha, M\u00e1rio; Sanchez, Gustavo; Marcon, C\u00e9sar; Agostini, Luciano<\/strong><\/div>\n
                            JOURNAL OF ELECTRONIC IMAGING \u00b7 2021 \u00b7 v. 30, p. 053009-1\u2013053009-17 DOI: 10.1117\/1.jei.30.5.053009<\/a><\/span><\/div>\n<\/li>\n
                          7. \n
                            Fast and energy-efficient approximate motion estimation architecture for real-time 4&nbsp;K UHD processing<\/div>\n
                            Porto, Roger; Perleberg, Murilo; Afonso, Vladimir; Zatt, Bruno; Roma, Nuno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                            Journal of Real-Time Image Processing \u00b7 2021 \u00b7 v. 18, p. 723\u2013737 DOI: 10.1007\/s11554-020-01014-6<\/a><\/span><\/div>\n<\/li>\n
                          8. \n
                            AV1 and VVC Video Codecs: Overview on Complexity Reduction and Hardware Design<\/div>\n
                            Correa, Marcel; Saldanha, Mario; Borges, Alex; Correa, Guilherme; Palomino, Daniel; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                            IEEE Open Journal of Circuits and Systems \u00b7 2021 \u00b7 v. 2, p. 564\u2013576 DOI: 10.1109\/ojcas.2021.3107254<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                            Trabalhos em eventos (9)<\/span><\/h3>\n
                              \n
                            1. \n
                              Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation<\/div>\n
                              Domanski, Robson; Kolodziejski, William; Correa, Guilherme; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                              2021 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2021 \u00b7 Daegu, p. 1\u20135 DOI: 10.1109\/ISCAS51556.2021.9401224<\/a><\/span><\/div>\n<\/li>\n
                            2. \n
                              Learning-Based Complexity Reduction Scheme for VVC Intra-Frame Prediction<\/div>\n
                              Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                              2021 International Conference on Visual Communications and Image Processing (VCIP) \u00b7 2021 \u00b7 Munich, p. 1\u20135 DOI: 10.1109\/VCIP53242.2021.9675394<\/a><\/span><\/div>\n<\/li>\n
                            3. \n
                              Infusion Profiler: an Architecture for Generation of Operational Profiles for Intravenous Infusions<\/div>\n
                              Fabr\u00edcio N. Ferreira; Felipe C. Gruendemann; Adenauer C. Yamin; Luciano V. Agostini<\/strong><\/div>\n
                              XV Simp\u00f3sio Brasileiro de Automa\u00e7\u00e3o Inteligente \u00b7 2021 \u00b7 Online DOI: 10.20906\/sbai.v1i1.2740<\/a><\/span><\/div>\n<\/li>\n
                            4. \n
                              Infer\u00eancia dos Per&#64257;s de Infus\u00e3o em Sistemas Intravenosos: Uma Abordagem Empregando T\u00e9cnicas de Aprendizagem de M\u00e1quina<\/div>\n
                              Ferreira, F. N.; Gruendemann, Felipe; Araujo, Ricardo; Yamim, Adenauer; Agostini, L. V.<\/strong><\/div>\n
                              SIMP\u00d3SIO BRASILEIRO DE COMPUTA\u00c7\u00c3O APLICADA \u00c0 SA\u00daDE (SBCAS) \u00b7 2021 \u00b7 Online, p. 1\u201312 <\/div>\n<\/li>\n
                            5. \n
                              Fast Block Size Decision for HEVC Encoders with On-the-Fly Trained Classifiers<\/div>\n
                              Correa, Guilherme; Dall’Oglio, Pargles; Palomino, Daniel; Agostini, Luciano<\/strong><\/div>\n
                              2020 28th European Signal Processing Conference (EUSIPCO) \u00b7 2021 \u00b7 Amsterdam, p. 540\u2013544 DOI: 10.23919\/Eusipco47968.2020.9287223<\/a><\/span><\/div>\n<\/li>\n
                            6. \n
                              Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding<\/div>\n
                              Neto, Luiz; Correa, Marcel; Palomino, Daniel; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                              2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS) \u00b7 2021 \u00b7 Arequipa, p. 1\u20135 DOI: 10.1109\/lascas51355.2021.9459136<\/a><\/span><\/div>\n<\/li>\n
                            7. \n
                              ESA360 – Early SKIP Mode Decision Algorithm for Fast ERP 360 Video Coding<\/div>\n
                              Storch, Iago; Correa, Guilherme; Zatt, Bruno; Agostini, Luciano<\/strong>; Palomino, Daniel<\/div>\n
                              2020 28th European Signal Processing Conference (EUSIPCO) \u00b7 2021 \u00b7 Amsterdam, p. 535\u2013539 DOI: 10.23919\/eusipco47968.2020.9287774<\/a><\/span><\/div>\n<\/li>\n
                            8. \n
                              Configurable Power\/Quality-Aware Hardware Design for the AV1 Directional Intra Frame Prediction<\/div>\n
                              Neto, Luiz; Correa, Marcel; Daniel Palomino, Bruno Zatt; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                              2021 34th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2021 \u00b7 Campinas, p. 1\u20135 DOI: 10.1109\/sbcci53441.2021.9529997<\/a><\/span><\/div>\n<\/li>\n
                            9. \n
                              Analysis of VVC Intra Prediction Block Partitioning Structure<\/div>\n
                              Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                              2021 International Conference on Visual Communications and Image Processing (VCIP) \u00b7 2021 \u00b7 Munich, p. 1\u20135 DOI: 10.1109\/VCIP53242.2021.9675347<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                              \n2020 (37 publica\u00e7\u00f5es)<\/span><\/summary>\n
                              \n

                              Artigos em peri\u00f3dicos (15)<\/span><\/h3>\n
                                \n
                              1. \n
                                UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders<\/div>\n
                                Porto, Roger; Correa, Marcel; Goebel, Jones; Zatt, Bruno; Roma, Nuno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                Journal of Real-Time Image Processing \u00b7 2020 \u00b7 v. 17, p. 1685\u20131701 DOI: 10.1007\/s11554-019-00934-2<\/a><\/span><\/div>\n<\/li>\n
                              2. \n
                                Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems<\/div>\n
                                Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS \u00b7 2020 \u00b7 v. 67, p. 1704\u20131714 DOI: 10.1109\/tcsi.2020.2977297<\/a><\/span><\/div>\n<\/li>\n
                              3. \n
                                Speedup evaluation of HEVC parallel video coding using Tiles<\/div>\n
                                Storch, Iago; Palomino, Daniel; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                Journal of Real-Time Image Processing \u00b7 2020 \u00b7 v. 17, p. 1469\u20131486 DOI: 10.1007\/s11554-019-00900-y<\/a><\/span><\/div>\n<\/li>\n
                              4. \n
                                Real-Time and Low-Power HEVC Deblocking Filter Architecture Targeting 8K UHD @ 60fps Videos<\/div>\n
                                Palau, Roberta de Carvalho Nobre; Porto, Marcelo; Agostini, Luciano<\/strong>; Correa, Guilherme; Goebel, Jones; Palomino, Daniel<\/div>\n
                                JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2020 \u00b7 v. 15, p. 1\u20139 DOI: 10.29292\/jics.v15i1.59<\/a><\/span><\/div>\n<\/li>\n
                              5. \n
                                Parallelism exploration for 3D high-efficiency video coding depth modeling mode one<\/div>\n
                                Sanchez, Gustavo; Agostini, Luciano<\/strong>; Sousa, Leonel; Marcon, C\u00e9sar<\/div>\n
                                Journal of Real-Time Image Processing \u00b7 2020 \u00b7 v. 17, p. 787\u2013797 DOI: 10.1007\/s11554-018-0819-3<\/a><\/span><\/div>\n<\/li>\n
                              6. \n
                                Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction<\/div>\n
                                Sanchez, Gustavo; Fernandes, Ramon; Cataldo, Rodrigo; Agostini, Luciano<\/strong>; Sousa, Leonel; Marcon, Cesar<\/div>\n
                                Ieee Design & Test \u00b7 2020 \u00b7 v. 37, p. 15\u201321 DOI: 10.1109\/mdat.2019.2952342<\/a><\/span><\/div>\n<\/li>\n
                              7. \n
                                Memory-aware Workload Balancing Technique based on Decision Trees for Parallel HEVC Video Coding<\/div>\n
                                Correa, Guilherme; Zatt, Bruno; Agostini, Luciano<\/strong>; Palomino, Daniel; Storch, Iago<\/div>\n
                                JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2020 \u00b7 v. 15, p. 1\u20139 DOI: 10.29292\/jics.v15i3.96<\/a><\/span><\/div>\n<\/li>\n
                              8. \n
                                High-Throughput Hardware for 3D-HEVC Depth-Map Intra Prediction<\/div>\n
                                Ucker, Mariana; Afonso, Vladimir; Saldanha, Mario; Audibert, Luan; Conceicao, Ruhan; Susin, Altamiro; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                Ieee Design & Test \u00b7 2020 \u00b7 v. 37, p. 7\u201314 DOI: 10.1109\/mdat.2019.2952344<\/a><\/span><\/div>\n<\/li>\n
                              9. \n
                                High-Throughput Hardware Design for 3D-HEVC Disparity Estimation<\/div>\n
                                Perleberg, Murilo; Susin, Altamiro; Afonso, Vladimir; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo; Conceicao, Ruhan<\/div>\n
                                Ieee Design & Test \u00b7 2020 \u00b7 v. 37, p. 22\u201329 DOI: 10.1109\/mdat.2019.2932938<\/a><\/span><\/div>\n<\/li>\n
                              10. \n
                                Fast 3D-HEVC Depth Map Encoding Using Machine Learning<\/div>\n
                                Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2020 \u00b7 v. 30, p. 850\u2013861 DOI: 10.1109\/tcsvt.2019.2898122<\/a><\/span><\/div>\n<\/li>\n
                              11. \n
                                Direct and Semi-Direct Frame Partitioning Mapping for Computation and Energy-Aware HEVC Transrating<\/div>\n
                                Concei\u00e7\u00e3o, Ruhan; Zatt, Bruno; Agostini, Luciano<\/strong>; Correa, Guilherme; Bubolz, Thiago Alves; Grellert, Mateus<\/div>\n
                                JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2020 \u00b7 v. 15, p. 1\u20138 DOI: 10.29292\/jics.v15i1.56<\/a><\/span><\/div>\n<\/li>\n
                              12. \n
                                Complexity and compression efficiency assessment of 3D-HEVC encoder<\/div>\n
                                Saldanha, M\u00e1rio; Concei\u00e7\u00e3o, Ruhan; Afonso, Vladimir; Avila, Giovanni; Susin, Altamiro; Porto, Marcelo; Zatt, Bruno; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                                MULTIMEDIA TOOLS AND APPLICATIONS (DORDRECHT. ONLINE) \u00b7 2020 \u00b7 v. 79, p. 25723\u201325746 DOI: 10.1007\/s11042-020-09257-y<\/a><\/span><\/div>\n<\/li>\n
                              13. \n
                                A High-Throughput Hardware Architecture for AV1 Non-Directional Intra Modes<\/div>\n
                                Correa, Marcel Moscarelli; Waskow, Bianca Hermann; Goebel, Jones William; Palomino, Daniel Munari; Correa, Guilherme Ribeiro; Agostini, Luciano Volcan<\/strong><\/div>\n
                                IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS \u00b7 2020 \u00b7 v. 67, p. 1481\u20131494 DOI: 10.1109\/tcsi.2020.2973031<\/a><\/span><\/div>\n<\/li>\n
                              14. \n
                                6WR: A Hardware Friendly 3D-HEVC DMM-1 Algorithm and its Energy-Aware and High-Throughput Design<\/div>\n
                                Perleberg, Murilo; Borges, Vinicius; Afonso, Vladimir; Palomino, Daniel; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS \u00b7 2020 \u00b7 v. 67, p. 836\u2013840 DOI: 10.1109\/tcsii.2020.2983959<\/a><\/span><\/div>\n<\/li>\n
                              15. \n
                                3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos<\/div>\n
                                Sanchez, Gustavo; Saldanha, Mario; Fernandes, Ramon; Cataldo, Rodrigo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ONLINE) \u00b7 2020 \u00b7 v. 67, p. 415\u2013427 DOI: 10.1109\/TCSI.2019.2929977<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                Trabalhos em eventos (19)<\/span><\/h3>\n
                                  \n
                                1. \n
                                  Spatially Adaptive Intra Mode Pre-Selection for ERP 360 Video Coding<\/div>\n
                                  Storch, Iago; Zatt, Bruno; Agostini, Luciano<\/strong>; Correa, Guilherme; Da Silva Cruz, Luis A.; Palomino, Daniel<\/div>\n
                                  ICASSP 2020 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) \u00b7 2020 \u00b7 Barcelona, p. 2178\u20132182 DOI: 10.1109\/icassp40776.2020.9053374<\/a><\/span><\/div>\n<\/li>\n
                                2. \n
                                  Memory Profiling of H.266 Versatile Video Coding Standard<\/div>\n
                                  Cerveira, Arthur; Agostini, Luciano<\/strong>; Zatt, Bruno; Sampaio, Felipe<\/div>\n
                                  2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2020 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/icecs49266.2020.9294952<\/a><\/span><\/div>\n<\/li>\n
                                3. \n
                                  Memory Assessment Of Versatile Video Coding<\/div>\n
                                  Cerveira, Arthur; Agostini, Luciano<\/strong>; Zatt, Bruno; Sampaio, Felipe<\/div>\n
                                  2020 IEEE International Conference on Image Processing (ICIP) \u00b7 2020 \u00b7 Abu Dhabi, p. 1186\u20131190 DOI: 10.1109\/icip40778.2020.9191358<\/a><\/span><\/div>\n<\/li>\n
                                4. \n
                                  Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC<\/div>\n
                                  Penny, Wagner; Correa, Guilherme; Agostini, Luciano<\/strong>; Palomino, Daniel; Porto, Marcelo; Nazar, Gabriel; Zatt, Bruno<\/div>\n
                                  2020 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2020 \u00b7 Sevilla, p. 1\u20135 DOI: 10.1109\/iscas45731.2020.9180976<\/a><\/span><\/div>\n<\/li>\n
                                5. \n
                                  High-Throughput CDEF Architecture for the AV1 Decoder Targeting 4K@60fps Videos<\/div>\n
                                  Zummach, Eduardo; Palau, Roberta; Goebel, Jones; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                  2020 IEEE 11th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2020 \u00b7 San Jose, p. 1\u20135 DOI: 10.1109\/lascas45839.2020.9068979<\/a><\/span><\/div>\n<\/li>\n
                                6. \n
                                  Fast Partitioning Decision Scheme for Versatile Video Coding Intra-Frame Prediction<\/div>\n
                                  Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                  2020 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2020 \u00b7 Sevilla, p. 1\u20135 DOI: 10.1109\/ISCAS45731.2020.9180980<\/a><\/span><\/div>\n<\/li>\n
                                7. \n
                                  Fast Intra Mode Decision for 3D-HEVC Depth Map Coding using Decision Trees<\/div>\n
                                  Moura, Christopher; Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                  2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2020 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/icecs49266.2020.9294919<\/a><\/span><\/div>\n<\/li>\n
                                8. \n
                                  Efficient Hardware Design for the AV1 CDEF Filter Targeting 4K UHD Videos<\/div>\n
                                  Zummach, Eduardo; Palau, Roberta; Goebel, Jones; Palomino, Daniel; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                  2020 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2020 \u00b7 Sevilla, p. 1\u20135 DOI: 10.1109\/iscas45731.2020.9180525<\/a><\/span><\/div>\n<\/li>\n
                                9. \n
                                  ERP-Based CTU Splitting Early Termination for Intra Prediction of 360 videos<\/div>\n
                                  Beling, Bernardo; Storch, Iago; Agostini, Luciano<\/strong>; Zatt, Bruno; Bampi, Sergio; Palomino, Daniel<\/div>\n
                                  2020 IEEE International Conference on Visual Communications and Image Processing (VCIP) \u00b7 2020 \u00b7 Macau, p. 359\u2013363 DOI: 10.1109\/vcip49819.2020.9301879<\/a><\/span><\/div>\n<\/li>\n
                                10. \n
                                  Directional Intra Frame Prediction Architecture with Edge Filter and Upsampling for AV1 Video Coding<\/div>\n
                                  Neto, Luiz; Correa, Marcel; Palomino, Daniel; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                                  2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2020 \u00b7 Campinas, p. 1\u20135 DOI: 10.1109\/SBCCI50935.2020.9189902<\/a><\/span><\/div>\n<\/li>\n
                                11. \n
                                  Complexity Analysis Of VVC Intra Coding<\/div>\n
                                  Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                  2020 IEEE International Conference on Image Processing (ICIP) \u00b7 2020 \u00b7 Abu Dhabi, p. 3119\u20133123 DOI: 10.1109\/ICIP40778.2020.9190970<\/a><\/span><\/div>\n<\/li>\n
                                12. \n
                                  Avalia\u00e7\u00e3o do Uso de Aprendizagem de M\u00e1quina na Infer\u00eancia de Perfis de Infus\u00f5es Intravenosas<\/div>\n
                                  Ferreira, Fabr\u00edcio; Gruendemann, Felipe; Araujo, Ricardo; Yamim, Adenauer; Agostini, Luciano<\/strong><\/div>\n
                                  XXXVIII Simp\u00f3sio Brasileiro de Telecomunica\u00e7\u00f5es e Processamento de Sinais \u00b7 2020 \u00b7 Florian\u00f3polis DOI: 10.14209\/sbrt.2020.1570660504<\/a><\/span><\/div>\n<\/li>\n
                                13. \n
                                  An UHD 4K@60fps Deblocking Filter Hardware Targeting the AV1 Decoder<\/div>\n
                                  Zummach, Eduardo; Palau, Roberta; Goebel, Jones; Sampaio, Felipe; Correa, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                  2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2020 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/ICECS49266.2020.9294930<\/a><\/span><\/div>\n<\/li>\n
                                14. \n
                                  An Overview of Dedicated Hardware Designs for State-of-the-Art AV1 and H.266\/VVC Video Codecs<\/div>\n
                                  Saldanha, Mario; Correa, Marcel; Correa, Guilherme; Palomino, Daniel; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                  2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2020 \u00b7 Glasgow, p. 1\u20135 DOI: 10.1109\/icecs49266.2020.9294862<\/a><\/span><\/div>\n<\/li>\n
                                15. \n
                                  ASIC Solution for the Directional Intra Prediction of the AV1 Encoder Targeting UHD 4K Videos<\/div>\n
                                  Correa, Marcel; Neto, Luiz; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                                  2020 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2020 \u00b7 Sevilla, p. 1\u20135 DOI: 10.1109\/iscas45731.2020.9180526<\/a><\/span><\/div>\n<\/li>\n
                                16. \n
                                  A Low-Complexity Algorithm and Its Low-Power and High-Throughput Architecture for 3D-HEVC DMM-1 Encoding Tool<\/div>\n
                                  Borges, Vinicius; Perleberg, Murilo; Afonso, Vladimir; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                  2020 IEEE 11th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2020 \u00b7 San Jose, p. 1\u20135 DOI: 10.1109\/lascas45839.2020.9068965<\/a><\/span><\/div>\n<\/li>\n
                                17. \n
                                  A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion Change<\/div>\n
                                  Borges, Vinicius; Perleberg, Murilo; Afonso, Vladimir; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                  2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2020 \u00b7 Campinas, p. 1\u20135 DOI: 10.1109\/SBCCI50935.2020.9189925<\/a><\/span><\/div>\n<\/li>\n
                                18. \n
                                  4D-DCT Hardware Architecture for JPEG Pleno Light Field Coding<\/div>\n
                                  Jahnke, Matheus; Goebel, Jones; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo; Zatt, Bruno<\/div>\n
                                  2020 IEEE International Conference on Visual Communications and Image Processing (VCIP) \u00b7 2020 \u00b7 Macau, p. 132\u2013136 DOI: 10.1109\/vcip49819.2020.9301781<\/a><\/span><\/div>\n<\/li>\n
                                19. \n
                                  2PSA: An Optimized and Flexible Power-Precision Scalable Adder<\/div>\n
                                  Porto, Roger; Zatt, Bruno; Roma, Nuno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                  2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2020 \u00b7 Campinas, p. 1\u20135 DOI: 10.1109\/SBCCI50935.2020.9189917<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                  Livros publicados ou organizados (1)<\/span><\/h3>\n
                                    \n
                                  1. \n
                                    Algorithms for Efficient and Fast 3D-HEVC Depth Map Encoding<\/div>\n
                                    Sanchez, Gustavo; Agostini, Luciano<\/strong>; Marcon, C\u00e9sar<\/div>\n
                                    Springer International Publishing \u00b7 Cham \u00b7 2020 \u00b7 ISBN 9783030259266, 83 p\u00e1ginas DOI: 10.1007\/978-3-030-25927-3<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                    Patentes (2)<\/span><\/h3>\n
                                      \n
                                    1. \n
                                      M\u00e9todo R\u00e1pido para Estima\u00e7\u00e3o de Movimento em V\u00eddeo Digital Utilizando \u00c1rvores de Decis\u00e3o<\/div>\n
                                      Correa, Guilherme; Goncalves, P.; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                      Brasil \u00b7 2020 \u00b7 Produto <\/div>\n<\/li>\n
                                    2. \n
                                      M\u00e9todo R\u00e1pido para Estima\u00e7\u00e3o de Movimento em V\u00eddeo Digital Utilizando \u00c1rvores de Decis\u00e3o<\/div>\n
                                      Corr\u00eaa, G.; Goncalves, P.; Agostini, L. V.<\/strong>; Porto, M.<\/div>\n
                                      Brasil \u00b7 2020 \u00b7 Produto <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                      \n2019 (31 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                      \n

                                      Artigos em peri\u00f3dicos (8)<\/span><\/h3>\n
                                        \n
                                      1. \n
                                        The Impacts of Equirectangular 360-degrees Videos in the Intra-Frame Prediction of HEVC<\/div>\n
                                        Storch, I.; Cruz, L. A. S.; Agostini, L. V.<\/strong>; Zatt, Bruno; Palomino, D. M.<\/div>\n
                                        JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2019 \u00b7 v. 14, p. 1\u201310 DOI: 10.29292\/jics.v14i1.46<\/a><\/span><\/div>\n<\/li>\n
                                      2. \n
                                        Quality and Energy-Aware HEVC Transrating Based on Machine Learning<\/div>\n
                                        Bubolz, Thiago Luiz Alves; Conceicao, Ruhan A.; Grellert, Mateus; Agostini, Luciano<\/strong>; Zatt, Bruno; Correa, Guilherme<\/div>\n
                                        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ONLINE) \u00b7 2019 \u00b7 v. 66, p. 2124\u20132136 DOI: 10.1109\/TCSI.2019.2903978<\/a><\/span><\/div>\n<\/li>\n
                                      3. \n
                                        Performance Analysis of Depth Intra-Coding in 3D-HEVC<\/div>\n
                                        Sanchez, Gustavo; Silveira, Jarbas; Agostini, Luciano V.<\/strong>; Marcon, Cesar<\/div>\n
                                        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2019 \u00b7 v. 29, p. 2509\u20132520 DOI: 10.1109\/tcsvt.2018.2865645<\/a><\/span><\/div>\n<\/li>\n
                                      4. \n
                                        High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation<\/div>\n
                                        Domanski, R. A.; Goebel, J.; Penny, W.; Porto, Marcelo; Palomino, D. M.; Zatt, Bruno; Agostini, L. V.<\/strong><\/div>\n
                                        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS \u00b7 2019 \u00b7 v. 66, p. 883\u2013887 DOI: 10.1109\/TCSII.2019.2909705<\/a><\/span><\/div>\n<\/li>\n
                                      5. \n
                                        Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse<\/div>\n
                                        Seidel, Ismael; Monteiro, Marcio; Bonotto, Bruno; Agostini, Luciano Volcan<\/strong>; Guntzel, Jose Luis<\/div>\n
                                        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS (ONLINE) \u00b7 2019 \u00b7 v. 66, p. 2102\u20132115 DOI: 10.1109\/TCSI.2019.2900004<\/a><\/span><\/div>\n<\/li>\n
                                      6. \n
                                        Energy-Aware Motion and Disparity Estimation System for 3D-HEVC With Run-Time Adaptive Memory Hierarchy<\/div>\n
                                        Afonso, Vladimir; Conceicao, Ruhan; Saldanha, Mario; Braatz, Luciano; Perleberg, Murilo; Correa, Guilherme; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno; Susin, Altamiro<\/div>\n
                                        IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2019 \u00b7 v. 29, p. 1878\u20131892 DOI: 10.1109\/tcsvt.2018.2847633<\/a><\/span><\/div>\n<\/li>\n
                                      7. \n
                                        Efficient reference frame compression scheme for video coding systems: algorithm and VLSI design<\/div>\n
                                        Silveira, Dieison; Povala, Guilherme; Amaral, L\u00edvia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                        Journal of Real-Time Image Processing \u00b7 2019 \u00b7 v. 16, p. 391\u2013411 DOI: 10.1007\/s11554-015-0551-1<\/a><\/span><\/div>\n<\/li>\n
                                      8. \n
                                        Analysis of parallel encoding using tiles in 3D High Efficiency Video Coding<\/div>\n
                                        Sanchez, Gustavo; Saldanha, M\u00e1rio; Agostini, Luciano<\/strong>; Marcon, C\u00e9sar<\/div>\n
                                        Signal Image and Video Processing \u00b7 2019 \u00b7 v. 13, p. 1079\u20131086 DOI: 10.1007\/s11760-019-01450-3<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                        Trabalhos em eventos (22)<\/span><\/h3>\n
                                          \n
                                        1. \n
                                          Time Reduction on 3D-HEVC Depth Maps Coding using Static Decision Trees Built Through Data Mining<\/div>\n
                                          Saldanha, M\u00e1rio; Porto, Marcelo; Marcon, C\u00e9sar; Agostini, Luciano<\/strong><\/div>\n
                                          XXV Simp\u00f3sio Brasileiro de Sistemas Multim\u00eddia e Web \u00b7 2019 \u00b7 Rio de Janeiro, p. 33\u201336 DOI: 10.5753\/webmedia_estendido.2019.8132<\/a><\/span><\/div>\n<\/li>\n
                                        2. \n
                                          TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding<\/div>\n
                                          Saldanha, Mario; Sanchez, Gustavo; Zatt, Bruno; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                          2019 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2019 \u00b7 Sapporo, p. 1\u20135 DOI: 10.1109\/iscas.2019.8702475<\/a><\/span><\/div>\n<\/li>\n
                                        3. \n
                                          SPODi: Simulador do Perfil Operacional de Dispositivos Intravenosos para Auxilio \u00e0 Tomada de Decis\u00f5es M\u00e9dicas<\/div>\n
                                          Gruendemann, Felipe; Agostini, Luciano<\/strong>; Machado, Roger; Ferreira, Fabr\u00edcio; Yamin, Adenauer; Barbosa, Jorge<\/div>\n
                                          XIX Simp\u00f3sio Brasileiro de Computa\u00e7\u00e3o Aplicada \u00e0 Sa\u00fade \u00b7 2019 \u00b7 Niter\u00f3i, p. 34\u201345 DOI: 10.5753\/sbcas.2019.6240<\/a><\/span><\/div>\n<\/li>\n
                                        4. \n
                                          Power-Efficient Approximate SAD Architecture with LOA Imprecise Adders<\/div>\n
                                          Porto, Roger; Agostini, Luciano<\/strong>; Zatt, Bruno; Roma, Nuno; Porto, Marcelo<\/div>\n
                                          2019 IEEE 10th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2019 \u00b7 Armenia, p. 65\u201369 DOI: 10.1109\/lascas.2019.8667554<\/a><\/span><\/div>\n<\/li>\n
                                        5. \n
                                          Online Machine Learning for Fast Coding Unit Decisions in HEVC<\/div>\n
                                          Correa, Guilherme; Dalloglio, Pargles; Palomino, Daniel; Agostini, Luciano<\/strong><\/div>\n
                                          2019 Data Compression Conference (DCC) \u00b7 2019 \u00b7 Snowbird, p. 564 DOI: 10.1109\/dcc.2019.00076<\/a><\/span><\/div>\n<\/li>\n
                                        6. \n
                                          Low-Power and High-Throughput Approximate 4\u00d74 DCT Hardware Architecture<\/div>\n
                                          Leme, Mateus; Braatz, Luciano; Palomino, Daniel; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                          2019 IEEE 10th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2019 \u00b7 Armenia, p. 245\u2013249 DOI: 10.1109\/lascas.2019.8667581<\/a><\/span><\/div>\n<\/li>\n
                                        7. \n
                                          Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors<\/div>\n
                                          Cardoso, Douglas Maciel; Tonetto, Rafael Billig; Brandalero, Marcelo; Agostini, Luciano<\/strong>; Nazar, Gabriel L.; Azambuja, Jose Rodrigo; Beck, Antonio Carlos Schneider<\/div>\n
                                          2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2019 \u00b7 Genoa, p. 201\u2013205 DOI: 10.1109\/icecs46596.2019.8964749<\/a><\/span><\/div>\n<\/li>\n
                                        8. \n
                                          IPBN: alerts management in intravenous electromedical devices using bayesian networks<\/div>\n
                                          Ferreira, F. N.; Yamin, Adenauer; Fleischmann, Ana M. Pernas; Agostini, L. V.<\/strong>; Souza, A.; Barbosa, J.<\/div>\n
                                          34th ACM\/SIGAPP Symposium on Applied Computing – SAC ’19 \u00b7 2019 \u00b7 Limassol, p. 775 <\/div>\n<\/li>\n
                                        9. \n
                                          High Throughput Hardware Design for AV1 Paeth and Smooth Intra Modes<\/div>\n
                                          Correa, Marcel; Waskow, Bianca; Zatt, Bruno; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                                          2019 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2019 \u00b7 Sapporo, p. 1\u20135 DOI: 10.1109\/iscas.2019.8702258<\/a><\/span><\/div>\n<\/li>\n
                                        10. \n
                                          Hardware design of DC\/CFL intra-prediction decoder for the AV1 codec<\/div>\n
                                          Goebel, Jones; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                          the 32nd Symposium \u00b7 2019 \u00b7 S\u00e3o Paulo, p. 1 DOI: 10.1145\/3338852.3339873<\/a><\/span><\/div>\n<\/li>\n
                                        11. \n
                                          HEVC Video Coding Using Decision Trees for a Memory-Friendly Tiles Workload Balance<\/div>\n
                                          Storch, I.; Zatt, Bruno; Agostini, L. V.<\/strong>; Corr\u00eaa, G.; Palomino, D. M.<\/div>\n
                                          34rd South Symposium on Microelectronics \u00b7 2019 \u00b7 Pelotas, p. 79\u201382 <\/div>\n<\/li>\n
                                        12. \n
                                          FastIntra360: A Fast Intra-Prediction Technique for 360-Degrees Video Coding<\/div>\n
                                          Storch, Iago; Zatt, Bruno; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis Alberto; Palomino, Daniel<\/div>\n
                                          2019 Data Compression Conference (DCC) \u00b7 2019 \u00b7 Snowbird, p. 605 DOI: 10.1109\/dcc.2019.00117<\/a><\/span><\/div>\n<\/li>\n
                                        13. \n
                                          Fast partitioning decision making for prediction units on H.264-to-HEVC transcoding using machine learning<\/div>\n
                                          Soares, Yan; Corr\u00eaa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                                          the 25th Brazillian Symposium \u00b7 2019 \u00b7 Rio de Janeiro, p. 161\u2013168 DOI: 10.1145\/3323503.3349553<\/a><\/span><\/div>\n<\/li>\n
                                        14. \n
                                          Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation<\/div>\n
                                          Penny, Wagner; Goebel, Jones; Correa, Douglas; Martins, Anderson; Nazar, Gabriel; Agostini, Luciano<\/strong>; Palomino, Daniel; Porto, Marcelo; Zatt, Bruno<\/div>\n
                                          2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2019 \u00b7 Genoa, p. 162\u2013166 DOI: 10.1109\/icecs46596.2019.8965050<\/a><\/span><\/div>\n<\/li>\n
                                        15. \n
                                          Encoding Efficiency and Computational Cost Assessment of State-Of-The-Art Point Cloud Codecs<\/div>\n
                                          Goncalves, Mateus; Agostini, Luciano<\/strong>; Palomino, Daniel; Porto, Marcelo; Correa, Guilherme<\/div>\n
                                          2019 IEEE International Conference on Image Processing (ICIP) \u00b7 2019 \u00b7 Taipei, p. 3726\u20133730 DOI: 10.1109\/icip.2019.8803524<\/a><\/span><\/div>\n<\/li>\n
                                        16. \n
                                          Compression Efficiency and Computational Cost Comparison between AV1 and HEVC Encoders<\/div>\n
                                          Bender, I. D.; Palomino, D. M.; Agostini, L. V.<\/strong>; Correa, Guilherme; Porto, Marcelo<\/div>\n
                                          2019 27th European Signal Processing Conference (EUSIPCO) \u00b7 2019 \u00b7 A Corunha, p. 1\u20135 DOI: 10.23919\/EUSIPCO.2019.8903006<\/a><\/span><\/div>\n<\/li>\n
                                        17. \n
                                          Complexity Scalable HEVC-to-AV1 Transcoding Based on Coding Tree Depth Inheritance<\/div>\n
                                          Borges, A.; Zatt, Bruno; Porto, Marcelo; Agostini, L. V.<\/strong>; Correa, Guilherme<\/div>\n
                                          2019 27th European Signal Processing Conference (EUSIPCO) \u00b7 2019 \u00b7 A Corunha, p. 1\u20135 DOI: 10.23919\/EUSIPCO.2019.8902565<\/a><\/span><\/div>\n<\/li>\n
                                        18. \n
                                          Approximate Subtractor Operator for Low-Power Video Coding Hardware Accelerators<\/div>\n
                                          Ferreira, Rafael; Leme, Mateus; Correa, Marcel; Agostini, Luciano<\/strong>; Diniz, Claudio; Zatt, Bruno<\/div>\n
                                          2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2019 \u00b7 Genoa, p. 426\u2013430 DOI: 10.1109\/icecs46596.2019.8964783<\/a><\/span><\/div>\n<\/li>\n
                                        19. \n
                                          A New Hardware Friendly 2D-DCT HEVC Compliant Algorithm and its High Throughput and Low Power Hardware Design<\/div>\n
                                          Braatz, Luciano Almeida; Beck, Antonio Carlos Schneider; Zatt, Bruno; Agostini, Luciano Volcan<\/strong>; Palomino, Daniel Munari; Porto, Marcelo Schiavon<\/div>\n
                                          2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2019 \u00b7 Genoa, p. 654\u2013658 DOI: 10.1109\/icecs46596.2019.8965063<\/a><\/span><\/div>\n<\/li>\n
                                        20. \n
                                          A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors<\/div>\n
                                          Tonetto, Rafael Billig; Cardoso, Douglas Maciel; Brandalero, Marcelo; Agostini, Luciano<\/strong>; Nazar, Gabriel L.; Azambuja, Jose Rodrigo; Beck, Antonio Carlos Schneider<\/div>\n
                                          2019 IFIP\/IEEE 27th International Conference on Very Large Scale Integration (VLSISoC) \u00b7 2019 \u00b7 Cuzco, p. 287\u2013290 DOI: 10.1109\/vlsi-soc.2019.8920350<\/a><\/span><\/div>\n<\/li>\n
                                        21. \n
                                          A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra Predictor<\/div>\n
                                          Correa, Marcel; Waskow, Bianca; Goebel, Jones; Palomino, Daniel; Correa, Guilherme; Agostini, Luciano<\/strong><\/div>\n
                                          2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) \u00b7 2019 \u00b7 Armenia, p. 93\u201397 DOI: 10.1109\/LASCAS.2019.8667544<\/a><\/span><\/div>\n<\/li>\n
                                        22. \n
                                          A Fast Local Mode Decision for the HEVC Intra Prediction Based on Direction Detection<\/div>\n
                                          Correa, M.; Zatt, Bruno; Palomino, D. M.; Correa, Guilherme; Agostini, L. V.<\/strong><\/div>\n
                                          2019 27th European Signal Processing Conference (EUSIPCO) \u00b7 2019 \u00b7 A Corunha, p. 1\u20135 DOI: 10.23919\/EUSIPCO.2019.8903093<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                          Cap\u00edtulos de livros (1)<\/span><\/h3>\n
                                            \n
                                          1. \n
                                            Real-time architectures for 3D video coding<\/div>\n
                                            Afonso, Vladimir; Saldanha, Mario; Conceicao, Ruhan; Perleberg, Murilo; Porto, Marcelo; Zatt, Bruno; Susin, Altamiro; Agostini, Luciano<\/strong><\/div>\n
                                            In: VLSI Architectures for Future Video Coding \u00b7 2019 \u00b7 Institution of Engineering and Technology, p. 191\u2013226, ISBN 9781785617102 DOI: 10.1049\/PBCS053E_ch6<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                            \n2018 (31 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                            \n

                                            Artigos em peri\u00f3dicos (7)<\/span><\/h3>\n
                                              \n
                                            1. \n
                                              Speedup-Oriented History-Based Tiling Algorithm for the HEVC Standard Targeting an Efficient Parallelism Exploration<\/div>\n
                                              Storch, I.; Palomino, D. M.; Zatt, Bruno; Agostini, L. V.<\/strong><\/div>\n
                                              JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2018 \u00b7 v. 13, p. 1\u20138 DOI: 10.29292\/jics.v13i1.24<\/a><\/span><\/div>\n<\/li>\n
                                            2. \n
                                              Reference frame context-adaptive variable-length coder: a real-time hardware-friendly approach for lossless external memory bandwidth reduction in current video-coding systems<\/div>\n
                                              Silveira, Dieison; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                              Journal of Real-Time Image Processing \u00b7 2018 \u00b7 v. 14, p. 249\u2013265 DOI: 10.1007\/s11554-014-0443-9<\/a><\/span><\/div>\n<\/li>\n
                                            3. \n
                                              High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator<\/div>\n
                                              Penny, Wagner; Goebel, Jones; Paim, Guilherme; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                              Journal of Real-Time Image Processing \u00b7 2018 \u00b7 v. 16, p. 175\u2013192 DOI: 10.1007\/s11554-018-0832-6<\/a><\/span><\/div>\n<\/li>\n
                                            4. \n
                                              Exploration of depth modeling mode one lossless wedgelets storage strategies for 3D-high efficiency video coding<\/div>\n
                                              Sanchez, Gustavo; Marcon, C\u00e9sar; Agostini, Luciano Volcan<\/strong><\/div>\n
                                              JOURNAL OF ELECTRONIC IMAGING \u00b7 2018 \u00b7 v. 27, p. 1\u201312 DOI: 10.1117\/1.jei.27.1.013025<\/a><\/span><\/div>\n<\/li>\n
                                            5. \n
                                              Energy and Rate-Aware Design for HEVC Motion Estimation Based on Pareto Efficiency<\/div>\n
                                              Perleberg, M.; Afonso, V.; Conceicao, R.; Susin, A.; Agostini, L. V.<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                              JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2018 \u00b7 v. 13, p. 1\u201312 DOI: 10.29292\/jics.v13i1.18<\/a><\/span><\/div>\n<\/li>\n
                                            6. \n
                                              Block-level fast coding scheme for depth maps in three-dimensional high efficiency video coding<\/div>\n
                                              Saldanha, M.; Sanchez, G.; Marcon, Cesar; Agostini, L. V.<\/strong><\/div>\n
                                              JOURNAL OF ELECTRONIC IMAGING \u00b7 2018 \u00b7 v. 27, p. 1\u20134 DOI: 10.1117\/1.jei.27.1.010502<\/a><\/span><\/div>\n<\/li>\n
                                            7. \n
                                              A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction<\/div>\n
                                              Sanchez, G.; Agostini, L. V.<\/strong>; Marcon, C\u00e9sar<\/div>\n
                                              JOURNAL OF VISUAL COMMUNICATION AND IMAGE REPRESENTATION \u00b7 2018 \u00b7 v. 54, p. 193\u2013203 DOI: 10.1016\/j.jvcir.2018.05.003<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                              Trabalhos em eventos (23)<\/span><\/h3>\n
                                                \n
                                              1. \n
                                                Power-Efficient and Memory-Aware Approximate Hardware Design for HEVC FME Interpolator<\/div>\n
                                                Penny, Wagner; Ucker, Mariana; Machado, Italo; Agostini, Luciano<\/strong>; Palomino, Daniel; Porto, Marcelo; Zatt, Bruno<\/div>\n
                                                2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2018 \u00b7 Bordeaux, p. 237\u2013240 DOI: 10.1109\/icecs.2018.8618009<\/a><\/span><\/div>\n<\/li>\n
                                              2. \n
                                                Octagonal-Axis Raster Pattern for Improved Test Zone Search Motion Estimation<\/div>\n
                                                Goncalves, Paulo; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                                                ICASSP 2018 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) \u00b7 2018 \u00b7 Calgary, p. 1763\u20131767 DOI: 10.1109\/ICASSP.2018.8462580<\/a><\/span><\/div>\n<\/li>\n
                                              3. \n
                                                Memory-Aware Tiles Workload Balance through Machine-Learnt Complexity Reduction for HEVC<\/div>\n
                                                Storch, Iago; Zatt, Bruno; Agostini, Luciano<\/strong>; Correa, Guilherme; Palomino, Daniel<\/div>\n
                                                2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2018 \u00b7 Bordeaux, p. 521\u2013524 DOI: 10.1109\/icecs.2018.8617909<\/a><\/span><\/div>\n<\/li>\n
                                              4. \n
                                                Low-Power and High-Throughput Architecture for 3D-HEVC Depth Modeling Mode 4<\/div>\n
                                                Ucker, Mariana; Afonso, Vladimir; Audibert, Luan; Susin, Altamiro; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533262<\/a><\/span><\/div>\n<\/li>\n
                                              5. \n
                                                Low-Power HEVC 1-D IDCT Hardware Architecture<\/div>\n
                                                Braatz, Luciano; Palomino, Daniel; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533236<\/a><\/span><\/div>\n<\/li>\n
                                              6. \n
                                                Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos<\/div>\n
                                                Sanchez, Gustavo; Fernandes, Ramon; Cataldo, Rodrigo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2018 \u00b7 Bordeaux, p. 201\u2013204 DOI: 10.1109\/ICECS.2018.8617878<\/a><\/span><\/div>\n<\/li>\n
                                              7. \n
                                                Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards<\/div>\n
                                                Fernandes, Ramon; Sanchez, Gustavo; Cataldo, Rodrigo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2018 \u00b7 Bordeaux, p. 205\u2013208 DOI: 10.1109\/ICECS.2018.8617953<\/a><\/span><\/div>\n<\/li>\n
                                              8. \n
                                                LF-CAE: Context-Adaptive Encoding for Lenslet Light Fields Using HEVC<\/div>\n
                                                Conceicao, Ruhan; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                2018 25th IEEE International Conference on Image Processing (ICIP) \u00b7 2018 \u00b7 Athens, p. 3174\u20133179 DOI: 10.1109\/icip.2018.8451345<\/a><\/span><\/div>\n<\/li>\n
                                              9. \n
                                                Intravenous Electromedical Equipment: A Proposal to Improve Accuracy in Generating Alerts<\/div>\n
                                                Ferreira, Fabricio N.; Joao, Leonardo; Lopes, Joao L. B.; Yamin, Adenauer C.; Agostini, Luciano V.<\/strong><\/div>\n
                                                2018 XLIV Latin American Computer Conference (CLEI) \u00b7 2018 \u00b7 S\u00e3o Paulo, p. 670\u2013679 DOI: 10.1109\/CLEI.2018.00086<\/a><\/span><\/div>\n<\/li>\n
                                              10. \n
                                                High-Throughput and Low-Power Integrated Direct\/Inverse HEVC Quantization Hardware Design<\/div>\n
                                                Braatz, Luciano; Zatt, Bruno; Palomino, Daniel; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                2018 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2018 \u00b7 Florence, p. 1\u20135 DOI: 10.1109\/iscas.2018.8351183<\/a><\/span><\/div>\n<\/li>\n
                                              11. \n
                                                High Throughput Multiplierless Architecture for VP9 Fractional Motion Estimation<\/div>\n
                                                Goebel, Jones; Agostini, Lucas<\/strong>; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533255<\/a><\/span><\/div>\n<\/li>\n
                                              12. \n
                                                High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos<\/div>\n
                                                Sanchez, Gustavo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                2018 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2018 \u00b7 Florence, p. 1\u20135 DOI: 10.1109\/ISCAS.2018.8351227<\/a><\/span><\/div>\n<\/li>\n
                                              13. \n
                                                Hardware-Oriented Wedgelet Evaluation Skip for DMM-1 in 3D-HEVC<\/div>\n
                                                Sanchez, Gustavo; Saldanha, Mario; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533231<\/a><\/span><\/div>\n<\/li>\n
                                              14. \n
                                                Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC<\/div>\n
                                                Afonso, Vladimir; Susin, Altamiro; Perleberg, Murilo; Conceicao, Ruhan; Correa, Guilherme; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                2018 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2018 \u00b7 Florence, p. 1\u20135 DOI: 10.1109\/ISCAS.2018.8351350<\/a><\/span><\/div>\n<\/li>\n
                                              15. \n
                                                Fast and energy-efficient HEVC transrating based on frame partitioning inheritance<\/div>\n
                                                Bubolz, Thiago; Conceicao, Ruhan; Grellert, Mateus; Zatt, Bruno; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                                                2018 IEEE 9th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2018 \u00b7 Puerto Vallarta, p. 1\u20134 DOI: 10.1109\/lascas.2018.8399905<\/a><\/span><\/div>\n<\/li>\n
                                              16. \n
                                                Fast 3D-Hevc Depth Maps Intra-Frame Prediction Using Data Mining<\/div>\n
                                                Saldanha, Mario; Sanchez, Gustavo; Marcon, Cesar; Agostini, Luciano<\/strong><\/div>\n
                                                ICASSP 2018 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) \u00b7 2018 \u00b7 Calgary, p. 1738\u20131742 DOI: 10.1109\/ICASSP.2018.8462283<\/a><\/span><\/div>\n<\/li>\n
                                              17. \n
                                                Energy-Aware HEVC Transrating based on Frame Partitioning Inheritance<\/div>\n
                                                Bubolz, Thiago; Conceicao, R.; Grellert, Mateus; Zatt, Bruno; Agostini, L. V.<\/strong>; Corr\u00eaa, G.<\/div>\n
                                                SForum 2018 – Student Forum on Microelectronics \u00b7 2018 \u00b7 Bento Gon\u00e7alves, p. 1\u20134 <\/div>\n<\/li>\n
                                              18. \n
                                                DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm<\/div>\n
                                                Sanchez, Gustavo; Fernandes, Ramon; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                2018 25th IEEE International Conference on Image Processing (ICIP) \u00b7 2018 \u00b7 Athens, p. 1782\u20131787 DOI: 10.1109\/ICIP.2018.8451620<\/a><\/span><\/div>\n<\/li>\n
                                              19. \n
                                                Configurable Cache Memory Architecture for Low-Energy Motion Estimation<\/div>\n
                                                Martins, Anderson; Penny, Wagner; Weber, Matheus; Agostini, Luciano<\/strong>; Porto, Marcelo; Palomino, Daniel; Mattos, Julio; Zatt, Bruno<\/div>\n
                                                2018 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2018 \u00b7 Florence, p. 1\u20135 DOI: 10.1109\/iscas.2018.8351662<\/a><\/span><\/div>\n<\/li>\n
                                              20. \n
                                                Coding- and Energy-Efficient FME Hardware Design<\/div>\n
                                                Seidel, Ismael; Rodrigues Filho, Vanio; Agostini, Luciano<\/strong>; Guntzel, Jose Luis<\/div>\n
                                                2018 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2018 \u00b7 Florence, p. 1\u20135 DOI: 10.1109\/ISCAS.2018.8351114<\/a><\/span><\/div>\n<\/li>\n
                                              21. \n
                                                ASIC power-estimation accuracy evaluation: A case study using video-coding architectures<\/div>\n
                                                Perleberg, Murilo R.; Goebel, Jones W.; Melo, Mateus S.; Afonso, Vladimir; Agostini, Luciano V.<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                2018 IEEE 9th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2018 \u00b7 Puerto Vallarta, p. 1\u20134 DOI: 10.1109\/LASCAS.2018.8399919<\/a><\/span><\/div>\n<\/li>\n
                                              22. \n
                                                A Power-Efficient and High-Throughput Hardware Design for 3D-HEVC Disparity Estimation<\/div>\n
                                                Perleberg, Murilo; Afonso, Vladismir; Conceicao, Ruhan; Susin, Altamiro; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533257<\/a><\/span><\/div>\n<\/li>\n
                                              23. \n
                                                3D-HEVC DMM-1 Parallelism Exploration Targeting Multicore Systems<\/div>\n
                                                Sanchez, Gustavo; Agostini, Luciano<\/strong>; Sousa, Leonel; Marcon, Cesar<\/div>\n
                                                2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2018 \u00b7 Bento Gon\u00e7alves – RS, p. 1\u20136 DOI: 10.1109\/SBCCI.2018.8533252<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                Patentes (1)<\/span><\/h3>\n
                                                  \n
                                                1. \n
                                                  M\u00e9todo de Otimiza\u00e7\u00e3o em Codifica\u00e7\u00e3o de Imagens Tridimensionais e Codificador para Imagens Tridimensionais<\/div>\n
                                                  Sanchez, Gustavo; Marcon, C\u00e9sar; Saldanha, M.; Agostini, L. V.<\/strong><\/div>\n
                                                  Brasil \u00b7 2018 \u00b7 Produto e Processo <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                  \n2017 (19 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                  \n

                                                  Artigos em peri\u00f3dicos (3)<\/span><\/h3>\n
                                                    \n
                                                  1. \n
                                                    Real-time scalable hardware architecture for 3D-HEVC bipartition modes<\/div>\n
                                                    Sanchez, Gustavo; Marcon, C\u00e9sar; Agostini, Luciano<\/strong><\/div>\n
                                                    Journal of Real-Time Image Processing \u00b7 2017 \u00b7 v. 13, p. 71\u201383 DOI: 10.1007\/s11554-016-0609-8<\/a><\/span><\/div>\n<\/li>\n
                                                  2. \n
                                                    Fast an Low-Power Hardware Design for HEVC Fractional Motion Estimation<\/div>\n
                                                    Afonso, V.; Conceicao, R.; Perleberg, M.; Porto, Marcelo; Zatt, Bruno; Agostini, L. V.<\/strong>; Susin, A.<\/div>\n
                                                    IEEE COMSOC MMTC Communications – Frontiers \u00b7 2017 \u00b7 v. 12, p. 6\u201311 <\/div>\n<\/li>\n
                                                  3. \n
                                                    Energy-aware scheme for the 3D-HEVC depth maps prediction<\/div>\n
                                                    Saldanha, M\u00e1rio; Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                    Journal of Real-Time Image Processing \u00b7 2017 \u00b7 v. 13, p. 55\u201369 DOI: 10.1007\/s11554-016-0597-8<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                    Trabalhos em eventos (15)<\/span><\/h3>\n
                                                      \n
                                                    1. \n
                                                      Rate and Complexity-Aware Coding Scheme for Fixed-Camera Videos Based on Region-of-Interest Detection<\/div>\n
                                                      Santos, Cristiano; Concei\u00e7\u00e3o, Ruhan; Agostini, Luciano<\/strong>; Corr\u00eaa, Guilherme; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                      the 23rd Brazillian Symposium \u00b7 2017 \u00b7 Gramado, p. 409\u2013412 DOI: 10.1145\/3126858.3131599<\/a><\/span><\/div>\n<\/li>\n
                                                    2. \n
                                                      Multiple early-termination scheme for TZ search algorithm based on data mining and decision trees<\/div>\n
                                                      Goncalves, Paulo; Correa, Guilherme; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                      2017 IEEE 19th International Workshop on Multimedia Signal Processing (MMSP) \u00b7 2017 \u00b7 Luton, p. 1\u20136 DOI: 10.1109\/mmsp.2017.8122245<\/a><\/span><\/div>\n<\/li>\n
                                                    3. \n
                                                      Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip<\/div>\n
                                                      Afonso, Vladimir; Susin, Altamiro; Audibert, Luan; Saldanha, Mario; Conceicao, Ruhan; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                      2017 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2017 \u00b7 Baltimore, p. 1\u20134 DOI: 10.1109\/iscas.2017.8050463<\/a><\/span><\/div>\n<\/li>\n
                                                    4. \n
                                                      Low-Area Scalable Hardware Architecture for DMM-1 Encoder of 3D-HEVC Video Coding Standard<\/div>\n
                                                      Sanchez, G.; Agostini, L. V.<\/strong>; Marcon, Cesar<\/div>\n
                                                      2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2017 \u00b7 Fortaleza, p. 1\u20136 <\/div>\n<\/li>\n
                                                    5. \n
                                                      High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos<\/div>\n
                                                      Correa, Marcel; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                      2017 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2017 \u00b7 Baltimore, p. 1\u20134 DOI: 10.1109\/iscas.2017.8050702<\/a><\/span><\/div>\n<\/li>\n
                                                    6. \n
                                                      High Speedup Tiling Algorithm for Parallel HEVC Encoding<\/div>\n
                                                      Storch, I.; Palomino, D. M.; Zatt, Bruno; Agostini, L. V.<\/strong><\/div>\n
                                                      SIM 2011 – XXXII Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2017 \u00b7 Rio Grande, p. 1\u20134 <\/div>\n<\/li>\n
                                                    7. \n
                                                      Energy-efficient motion estimation with approximate arithmetic<\/div>\n
                                                      Porto, Roger; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo; Roma, Nuno; Sousa, Leonel<\/div>\n
                                                      2017 IEEE 19th International Workshop on Multimedia Signal Processing (MMSP) \u00b7 2017 \u00b7 Luton, p. 1 DOI: 10.1109\/mmsp.2017.8122248<\/a><\/span><\/div>\n<\/li>\n
                                                    8. \n
                                                      Energy evaluation of the HEVC decoding for different encoding configurations<\/div>\n
                                                      Correa, Douglas; Palomino, Daniel; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                      2017 IEEE 8th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2017 \u00b7 Bariloche, p. 1\u20134 DOI: 10.1109\/LASCAS.2017.7948088<\/a><\/span><\/div>\n<\/li>\n
                                                    9. \n
                                                      Edge-aware depth motion estimation \u00bf A complexity reduction scheme for 3D-HEVC<\/div>\n
                                                      Sanchez, Gustavo; Saldanha, Mario; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                      2017 25th European Signal Processing Conference (EUSIPCO) \u00b7 2017 \u00b7 Kos, p. 1524\u20131573 DOI: 10.23919\/EUSIPCO.2017.8081464<\/a><\/span><\/div>\n<\/li>\n
                                                    10. \n
                                                      Depth modeling modes complexity control system for the 3D-HEVC video encoder<\/div>\n
                                                      Sanchez, Gustavo; Saldanha, Mario; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                      2017 25th European Signal Processing Conference (EUSIPCO) \u00b7 2017 \u00b7 Kos, p. 1021\u20131060 DOI: 10.23919\/EUSIPCO.2017.8081362<\/a><\/span><\/div>\n<\/li>\n
                                                    11. \n
                                                      Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification<\/div>\n
                                                      Avila, Giovanni; Conceicao, Ruhan; Bubolz, Thiago; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong>; Correa, Guilherme<\/div>\n
                                                      2017 25th European Signal Processing Conference (EUSIPCO) \u00b7 2017 \u00b7 Kos, p. 1031\u20131070 DOI: 10.23919\/EUSIPCO.2017.8081364<\/a><\/span><\/div>\n<\/li>\n
                                                    12. \n
                                                      Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps<\/div>\n
                                                      Sanchez, Gustavo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                      2017 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2017 \u00b7 Baltimore, p. 1\u20134 DOI: 10.1109\/iscas.2017.8050461<\/a><\/span><\/div>\n<\/li>\n
                                                    13. \n
                                                      Characterizing energy consumption in software HEVC encoders: HM vs x265<\/div>\n
                                                      Machado, Italo; Penny, Wagner; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                      2017 IEEE 8th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2017 \u00b7 Bariloche, p. 1\u20134 DOI: 10.1109\/lascas.2017.7948097<\/a><\/span><\/div>\n<\/li>\n
                                                    14. \n
                                                      Cache Memory Energy Efficiency Exploration for the HEVC Motion Estimation<\/div>\n
                                                      Martins, Anderson; Penny, Wagner; Weber, Matheus; Palomino, Daniel; Mattos, Julio; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                      2017 VII Brazilian Symposium on Computing Systems Engineering (SBESC) \u00b7 2017 \u00b7 Curitiba, p. 31\u20136 DOI: 10.1109\/sbesc.2017.11<\/a><\/span><\/div>\n<\/li>\n
                                                    15. \n
                                                      A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding<\/div>\n
                                                      Braatz, Luciano; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                      2017 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2017 \u00b7 Baltimore, p. 1\u20134 DOI: 10.1109\/iscas.2017.8050704<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                      Patentes (1)<\/span><\/h3>\n
                                                        \n
                                                      1. \n
                                                        Conjunto de Algoritmos de Baixa Complexidade para Particionamento de Coding Units na Codifica\u00e7\u00e3o de V\u00eddeos Digitais Segundo o Padr\u00e3o H.265\/HEVC<\/div>\n
                                                        Corr\u00eaa, G.; Agostini, L. V.<\/strong><\/div>\n
                                                        Brasil \u00b7 2017 \u00b7 Produto <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                        \n2016 (26 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                        \n

                                                        Artigos em peri\u00f3dicos (6)<\/span><\/h3>\n
                                                          \n
                                                        1. \n
                                                          Pareto-Based Method for High Efficiency Video Coding With Limited Encoding Time<\/div>\n
                                                          Correa, Guilherme; Assuncao, Pedro A.; Agostini, Luciano Volcan<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                          IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2016 \u00b7 v. 26, p. 1734\u20131745 DOI: 10.1109\/tcsvt.2015.2469533<\/a><\/span><\/div>\n<\/li>\n
                                                        2. \n
                                                          Hardware Implementation for the HEVC Fractional Motion Estimation Targeting Real-Time and Low-Energy<\/div>\n
                                                          Afonso, V.; Maich, H.; Audibert, L.; Zatt, Bruno; Porto, Marcelo; Agostini, L. V.<\/strong>; Susin, A.<\/div>\n
                                                          JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2016 \u00b7 v. 11, p. 106\u2013120 DOI: 10.29292\/jics.v11i2.435<\/a><\/span><\/div>\n<\/li>\n
                                                        3. \n
                                                          Fast intra prediction algorithm based on texture analysis for 3D-HEVC encoders<\/div>\n
                                                          Da Silva, Tha\u00edsa Leal; Agostini, Luciano Volcan<\/strong>; Da Silva Cruz, Luis Alberto<\/div>\n
                                                          Journal of Real-Time Image Processing \u00b7 2016 \u00b7 v. 12, p. 357\u2013368 DOI: 10.1007\/s11554-015-0533-3<\/a><\/span><\/div>\n<\/li>\n
                                                        4. \n
                                                          Fast coding tree structure decision for HEVC&nbsp;based on classification trees<\/div>\n
                                                          Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                          ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING \u00b7 2016 \u00b7 v. 87, p. 129\u2013139 DOI: 10.1007\/s10470-016-0719-z<\/a><\/span><\/div>\n<\/li>\n
                                                        5. \n
                                                          DFPS: a fast pattern selector for depth modeling mode 1 in three-dimensional high-efficiency video coding standard<\/div>\n
                                                          Sanchez, Gustavo; Jordani, L.; Marcon, Cesar; Agostini, L. V.<\/strong><\/div>\n
                                                          Journal of Electronic Imaging (Print) \u00b7 2016 \u00b7 v. 25, p. 063011 DOI: 10.1117\/1.jei.25.6.063011<\/a><\/span><\/div>\n<\/li>\n
                                                        6. \n
                                                          Complexity scalability for real-time HEVC encoders<\/div>\n
                                                          Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                          Journal of Real-Time Image Processing \u00b7 2016 \u00b7 v. 12, p. 107\u2013122 DOI: 10.1007\/s11554-013-0392-8<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                          Trabalhos em eventos (18)<\/span><\/h3>\n
                                                            \n
                                                          1. \n
                                                            Squarer exploration for energy-efficient sum of squared differences<\/div>\n
                                                            Seidel, Ismael; Monteiro, Marcio; Guntzel, Jose Luis; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE 7th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2016 \u00b7 Florianopolis, p. 327\u2013330 DOI: 10.1109\/LASCAS.2016.7451076<\/a><\/span><\/div>\n<\/li>\n
                                                          2. \n
                                                            Speedup-aware history-based tiling algorithm for the HEVC standard<\/div>\n
                                                            Storch, Iago; Palomino, Daniel; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 824\u2013829 DOI: 10.1109\/icip.2016.7532472<\/a><\/span><\/div>\n<\/li>\n
                                                          3. \n
                                                            Solutions for DMM-1 complexity reduction in 3D-HEVC based on gradient calculation<\/div>\n
                                                            Saldanha, Mario; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong>; Sanchez, Gustavo<\/div>\n
                                                            2016 IEEE 7th Latin American Symposium on Circuits &amp; Systems (LASCAS) \u00b7 2016 \u00b7 Florianopolis, p. 211\u2013214 DOI: 10.1109\/lascas.2016.7451047<\/a><\/span><\/div>\n<\/li>\n
                                                          4. \n
                                                            Real-time simplified edge detector architecture for 3D-HEVC depth maps coding<\/div>\n
                                                            Sanchez, Gustavo; Saldanha, Mario; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                            2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2016 \u00b7 Monte Carlo, p. 352\u2013356 DOI: 10.1109\/icecs.2016.7841205<\/a><\/span><\/div>\n<\/li>\n
                                                          5. \n
                                                            Rate-distortion-complexity analysis for prediction unit modes in 3D-HEVC depth coding<\/div>\n
                                                            Conceicao, Ruhan; Avila, Giovanni; Correa, Guilherme; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) \u00b7 2016 \u00b7 Florianopolis, p. 287\u2013290 DOI: 10.1109\/lascas.2016.7451066<\/a><\/span><\/div>\n<\/li>\n
                                                          6. \n
                                                            Rate-constrained successive elimination of Hadamard-based SATDs<\/div>\n
                                                            Seidel, Ismael; Cancellier, Luiz Henrique; Guntzel, Jose Luis; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 2395\u20132399 DOI: 10.1109\/ICIP.2016.7532788<\/a><\/span><\/div>\n<\/li>\n
                                                          7. \n
                                                            Pareto-based energy control for the HEVC encoder<\/div>\n
                                                            Penny, Wagner; Machado, Italo; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 814\u2013819 DOI: 10.1109\/icip.2016.7532470<\/a><\/span><\/div>\n<\/li>\n
                                                          8. \n
                                                            High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards<\/div>\n
                                                            Paim, Guilherme; Goebel, Jones; Penny, Wagner; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 2162\u20132167 DOI: 10.1109\/icip.2016.7532741<\/a><\/span><\/div>\n<\/li>\n
                                                          9. \n
                                                            Fast H.264\/AVC to HEVC transcoder based on data mining and decision trees<\/div>\n
                                                            Correa, Guilherme; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                            2016 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2016 \u00b7 Montr\u00e9al, p. 2539\u20132542 DOI: 10.1109\/ISCAS.2016.7539110<\/a><\/span><\/div>\n<\/li>\n
                                                          10. \n
                                                            Energy-efficient SATD for beyond HEVC<\/div>\n
                                                            Seidel, Ismael; Beims Brascher, Andre; Guntzel, Jose Luis; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2016 \u00b7 Montr\u00e9al, p. 802\u2013805 DOI: 10.1109\/ISCAS.2016.7527362<\/a><\/span><\/div>\n<\/li>\n
                                                          11. \n
                                                            Energy-aware light-weight DMM-1 patterns decoders with efficiently storage in 3D-HEVC<\/div>\n
                                                            Sanchez, Gustavo; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                            2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2016 \u00b7 Belo Horizonte, p. 1\u20136 DOI: 10.1109\/SBCCI.2016.7724038<\/a><\/span><\/div>\n<\/li>\n
                                                          12. \n
                                                            Energy analisys of motion estimation memory transference on embedded processors<\/div>\n
                                                            Maich, Henrique; Melo, Mateus; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                            2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) \u00b7 2016 \u00b7 Florianopolis, p. 319\u2013322 DOI: 10.1109\/lascas.2016.7451074<\/a><\/span><\/div>\n<\/li>\n
                                                          13. \n
                                                            Complexity reduction for 3D-HEVC depth map coding based on early Skip and early DIS scheme<\/div>\n
                                                            Conceicao, Ruhan; Avila, Giovanni; Correa, Guilherme; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 1116\u20131121 DOI: 10.1109\/icip.2016.7532531<\/a><\/span><\/div>\n<\/li>\n
                                                          14. \n
                                                            Coarse grain partial distortion elimination for Hadamard ME in HEVC<\/div>\n
                                                            Seidel, Ismael; Guntzel, Jose Luis; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2016 \u00b7 Monte Carlo, p. 704\u2013708 DOI: 10.1109\/ICECS.2016.7841299<\/a><\/span><\/div>\n<\/li>\n
                                                          15. \n
                                                            An efficient sub-sample interpolator hardware for VP9-10 standards<\/div>\n
                                                            Paim, Guilherme; Penny, Wagner; Goebel, Jones; Afonso, Vladimir; Susin, Altamiro; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                            2016 IEEE International Conference on Image Processing (ICIP) \u00b7 2016 \u00b7 Phoenix, p. 2167\u20132172 DOI: 10.1109\/icip.2016.7532742<\/a><\/span><\/div>\n<\/li>\n
                                                          16. \n
                                                            An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs<\/div>\n
                                                            Goebel, Jones; Paim, Guilherme; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                            2016 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2016 \u00b7 Montr\u00e9al, p. 2202\u20132205 DOI: 10.1109\/ISCAS.2016.7539019<\/a><\/span><\/div>\n<\/li>\n
                                                          17. \n
                                                            A parallel Motion Estimation solution for heterogeneous System on Chip<\/div>\n
                                                            Melo, Mateus; Smaniotto, Gustavo; Maich, Henrique; Agostini, Luciano<\/strong>; Zatt, Bruno; Rosa, Leomar; Porto, Marcelo<\/div>\n
                                                            2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2016 \u00b7 Belo Horizonte, p. 1\u20136 DOI: 10.1109\/SBCCI.2016.7724063<\/a><\/span><\/div>\n<\/li>\n
                                                          18. \n
                                                            3D-HEVC depth maps intra prediction complexity analysis<\/div>\n
                                                            Sanchez, Gustavo; Cataldo, Rodrigo; Fernandes, Ramon; Agostini, Luciano<\/strong>; Marcon, Cesar<\/div>\n
                                                            2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2016 \u00b7 Monte Carlo, p. 348\u2013352 DOI: 10.1109\/ICECS.2016.7841204<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                            Livros publicados ou organizados (1)<\/span><\/h3>\n
                                                              \n
                                                            1. \n
                                                              Complexity-Aware High Efficiency Video Coding<\/div>\n
                                                              Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Cruz, Luis A. da Silva<\/div>\n
                                                              Springer International Publishing \u00b7 Berlin \u00b7 2016 \u00b7 ISBN 9783319257761, 225 p\u00e1ginas DOI: 10.1007\/978-3-319-25778-5<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                              Cap\u00edtulos de livros (1)<\/span><\/h3>\n
                                                                \n
                                                              1. \n
                                                                Arquitetura de Hardware para um Compressor de Quadros de Refer\u00eancia em Codificadores de V\u00eddeos Digitais<\/div>\n
                                                                Silveira, Dieison; Povala, Guilheme; Amaral, L.; Zatt, Bruno; Agostini, Luciano V.<\/strong>; Porto, Marcelo<\/div>\n
                                                                In: Trabalhos Premiados – 2014: CIC 2014 – XXIII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel e ENPOS 2014 – XVI Encontro de P\u00f3s-Gradua\u00e7\u00e3o da UFPel \u00b7 2016 \u00b7 Editora UFPel, p. 129\u2013145, ISBN 9788571929715 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                \n2015 (18 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                \n

                                                                Artigos em peri\u00f3dicos (4)<\/span><\/h3>\n
                                                                  \n
                                                                1. \n
                                                                  Hardware-friendly HEVC motion estimation: new algorithms and efficient VLSI designs targeting high definition videos<\/div>\n
                                                                  Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                  ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING (DORDRECHT. ONLINE) \u00b7 2015 \u00b7 v. 82, p. 135\u2013146 DOI: 10.1007\/s10470-014-0342-9<\/a><\/span><\/div>\n<\/li>\n
                                                                2. \n
                                                                  Fast HEVC Encoding Decisions Using Data Mining<\/div>\n
                                                                  Correa, Guilherme; Assuncao, Pedro A.; Agostini, Luciano Volcan<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                  IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY \u00b7 2015 \u00b7 v. 25, p. 660\u2013673 DOI: 10.1109\/tcsvt.2014.2363753<\/a><\/span><\/div>\n<\/li>\n
                                                                3. \n
                                                                  Exploring Optimized Hadamard Methods to Design Energy-Efficient SATD Architectures<\/div>\n
                                                                  Cancellier, L. H.; Brascher, A. B.; Seidel, I.; G\u00fcntzel, J. L. A.; Agostini, L. V.<\/strong><\/div>\n
                                                                  JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2015 \u00b7 v. 10, p. 113\u2013122 DOI: 10.29292\/jics.v10i2.412<\/a><\/span><\/div>\n<\/li>\n
                                                                4. \n
                                                                  DMMFast: a complexity reduction scheme for three-dimensional high-efficiency video coding intraframe depth map coding<\/div>\n
                                                                  Sanchez, Gustavo; Saldanha, M.; Balota, Gabriel; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano V.<\/strong><\/div>\n
                                                                  JOURNAL OF ELECTRONIC IMAGING \u00b7 2015 \u00b7 v. 24, p. 023011 DOI: 10.1117\/1.jei.24.2.023011<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                  Trabalhos em eventos (13)<\/span><\/h3>\n
                                                                    \n
                                                                  1. \n
                                                                    S-GMOF: A gradient-based complexity reduction algorithm for depth-maps intra prediction on 3D-HEVC<\/div>\n
                                                                    Sanchez, Gustavo; Saldanha, Mario; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                    2015 IEEE 6th Latin American Symposium on Circuits &amp; Systems (LASCAS 2015) \u00b7 2015 \u00b7 Montevideo, p. 1\u20134 DOI: 10.1109\/lascas.2015.7250455<\/a><\/span><\/div>\n<\/li>\n
                                                                  2. \n
                                                                    Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos<\/div>\n
                                                                    Penny, Wagner; Paim, Guilherme; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                                    the 28th Symposium \u00b7 2015 \u00b7 Salvador, p. 1\u20134 DOI: 10.1145\/2800986.2801024<\/a><\/span><\/div>\n<\/li>\n
                                                                  3. \n
                                                                    Memory-Aware and High-Throughput Hardware Design for the HEVC Fractional Motion Estimation<\/div>\n
                                                                    Afonso, Vladimir; Maich, Henrique; Audibert, Luan; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                    the 28th Symposium \u00b7 2015 \u00b7 Salvador, p. 1\u20134 DOI: 10.1145\/2800986.2801017<\/a><\/span><\/div>\n<\/li>\n
                                                                  4. \n
                                                                    Hardware design of fast HEVC 2-D IDCT targeting real-time UHD 4K applications<\/div>\n
                                                                    Conceicao, Ruhan; Araujo, Andrio; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                                    2015 IEEE 6th Latin American Symposium on Circuits &amp; Systems (LASCAS 2015) \u00b7 2015 \u00b7 Montevideo, p. 1\u20134 DOI: 10.1109\/lascas.2015.7250473<\/a><\/span><\/div>\n<\/li>\n
                                                                  5. \n
                                                                    Fast mode selection algorithm based on texture analysis for 3D-HEVC intra prediction<\/div>\n
                                                                    Da Silva, Thaisa L.; Agostini, Luciano V.<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                    2015 IEEE International Conference on Multimedia and Expo (ICME) \u00b7 2015 \u00b7 Turin, p. 1\u20136 DOI: 10.1109\/icme.2015.7177511<\/a><\/span><\/div>\n<\/li>\n
                                                                  6. \n
                                                                    Encoding time control system for HEVC based on Rate-Distortion-Complexity analysis<\/div>\n
                                                                    Correa, Guilherme; Assuncao, Pedro; Da Silva Cruz, Luis A.; Agostini, Luciano<\/strong><\/div>\n
                                                                    2015 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2015 \u00b7 Lisbon, p. 1114\u20131117 DOI: 10.1109\/iscas.2015.7168833<\/a><\/span><\/div>\n<\/li>\n
                                                                  7. \n
                                                                    Compressor de Quadros de Refer\u00eancia de Alta Efici\u00eancia para Codificadores de V\u00eddeo de Alta Defini\u00e7\u00e3o<\/div>\n
                                                                    Povala, G.; Amaral, Livia; Silveira, D.; Porto, Marcelo; Zatt, Bruno; Agostini, L. V.<\/strong><\/div>\n
                                                                    XXIV Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2015 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                  8. \n
                                                                    Complexity reduction for the 3D-HEVC depth maps coding<\/div>\n
                                                                    Saldanha, Mario; Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                    2015 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2015 \u00b7 Lisbon, p. 621\u2013624 DOI: 10.1109\/ISCAS.2015.7168710<\/a><\/span><\/div>\n<\/li>\n
                                                                  9. \n
                                                                    A real-time architecture for reference frame compression for high definition video coders<\/div>\n
                                                                    Silveira, Dieison; Povala, Guilherme; Amaral, Livia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                    2015 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2015 \u00b7 Lisbon, p. 842\u2013845 DOI: 10.1109\/ISCAS.2015.7168765<\/a><\/span><\/div>\n<\/li>\n
                                                                  10. \n
                                                                    A multi-standard interpolation hardware solution for H.264 and HEVC<\/div>\n
                                                                    Maich, Henrique; Paim, Guilherme; Afonso, Vladimir; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                                    2015 IEEE International Conference on Image Processing (ICIP) \u00b7 2015 \u00b7 Quebec City, p. 2910\u20132914 DOI: 10.1109\/icip.2015.7351335<\/a><\/span><\/div>\n<\/li>\n
                                                                  11. \n
                                                                    A multi-standard interpolation filter for motion compensated prediction on high definition videos<\/div>\n
                                                                    Maich, Henrique; Paim, Guilherme; Afonso, Vladimir; Agostini, Luciano<\/strong>; Zatt, Bruno; Porto, Marcelo<\/div>\n
                                                                    2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS 2015) \u00b7 2015 \u00b7 Montevideo, p. 1\u20134 DOI: 10.1109\/lascas.2015.7250478<\/a><\/span><\/div>\n<\/li>\n
                                                                  12. \n
                                                                    A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264\/AVC Video Encoder<\/div>\n
                                                                    Corr\u00eaa, Marcel; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                                    the 28th Symposium \u00b7 2015 \u00b7 Salvador, p. 1\u20134 DOI: 10.1145\/2800986.2800994<\/a><\/span><\/div>\n<\/li>\n
                                                                  13. \n
                                                                    A Hardware Architecture for an HEVC Motion Compensation Luminance Interpolator<\/div>\n
                                                                    Penny, W.; Porto, Marcelo; Agostini, L. V.<\/strong>; Zatt, Bruno<\/div>\n
                                                                    XXX Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2015 \u00b7 Santa Maria, p. 1\u20134 <\/div>\n<\/li>\n<\/ol>\n

                                                                    Cap\u00edtulos de livros (1)<\/span><\/h3>\n
                                                                      \n
                                                                    1. \n
                                                                      Arquiteturas de Hardware Dedicadas para as Transformadas Discretas dos Cossenos do Padr\u00e3o HEVC<\/div>\n
                                                                      De Souza, J. Claudio; Conceicao, R.; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano V.<\/strong><\/div>\n
                                                                      In: Trabalhos Premiados – 2013: CIC 2013 – XXII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel e ENPOS 2013 – XV Encontro de P\u00f3s-Gradua\u00e7\u00e3o da UFPel \u00b7 2015 \u00b7 Editora UFPel, p. 167\u2013180, ISBN 9788571920715 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                      \n2014 (25 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                      \n

                                                                      Artigos em peri\u00f3dicos (3)<\/span><\/h3>\n
                                                                        \n
                                                                      1. \n
                                                                        Low-Cost and High-Throughput Hardware Design for the HEVC 16×16 2-D DCT Transform<\/div>\n
                                                                        Conceicao, R.; Souza Jr., J. C.; Jeske, R. G.; Zatt, Bruno; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                        JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2014 \u00b7 v. 9, p. 25\u201335 DOI: 10.29292\/jics.v9i1.386<\/a><\/span><\/div>\n<\/li>\n
                                                                      2. \n
                                                                        Inter-view prediction of intra mode decision forhigh-efficiency video coding-based multiviewvideo coding<\/div>\n
                                                                        Silva, Thaisa Leal da; Agostini, L. V.<\/strong>; Cruz, Luis A. da Silva<\/div>\n
                                                                        Journal of Electronic Imaging (Print) \u00b7 2014 \u00b7 v. 23, p. 033008 DOI: 10.1117\/1.JEI.23.3.033008<\/a><\/span><\/div>\n<\/li>\n
                                                                      3. \n
                                                                        HEVC intra prediction acceleration based on texture direction and prediction unit modes reuse<\/div>\n
                                                                        Da Silva, Tha\u00edsa Leal; Agostini, Luciano Volcan<\/strong>; Da Silva Cruz, Luis Alberto<\/div>\n
                                                                        APSIPA Transactions on Signal and Information Processing \u00b7 2014 \u00b7 v. 3, p. e13 DOI: 10.1017\/atsip.2014.14<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                        Trabalhos em eventos (21)<\/span><\/h3>\n
                                                                          \n
                                                                        1. \n
                                                                          Sample adaptive offset filter hardware design for HEVC encoder<\/div>\n
                                                                          Rediess, Fabiane; Conceicao, Ruhan; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 Visual Communications and Image Processing (VCIP) \u00b7 2014 \u00b7 Valletta, p. 299\u2013302 DOI: 10.1109\/vcip.2014.7051563<\/a><\/span><\/div>\n<\/li>\n
                                                                        2. \n
                                                                          Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders<\/div>\n
                                                                          Conceicao, Ruhan; De Souza, J. Claudio; Jeske, Ricardo; Porto, Marcelo; Zatt, Bruno; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2014 \u00b7 Melbourne VIC, p. 1925\u20131928 DOI: 10.1109\/ISCAS.2014.6865537<\/a><\/span><\/div>\n<\/li>\n
                                                                        3. \n
                                                                          Overview and quality analysis in 3D-HEVC emergent video coding standard<\/div>\n
                                                                          Balota, Gabriel; Saldanha, Mario; Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2014 \u00b7 Santiago, p. 1\u20134 DOI: 10.1109\/LASCAS.2014.6820260<\/a><\/span><\/div>\n<\/li>\n
                                                                        4. \n
                                                                          Memory energy consumption reduction in video coding systems<\/div>\n
                                                                          Amaral, Livia; Silveira, Dieison; Povala, Guilheme; Porto, Marcelo; Agostini, Luciano<\/strong>; Zatt, Bruno<\/div>\n
                                                                          2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2014 \u00b7 Santiago, p. 1\u20134 DOI: 10.1109\/LASCAS.2014.6820299<\/a><\/span><\/div>\n<\/li>\n
                                                                        5. \n
                                                                          Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding<\/div>\n
                                                                          Silveira, Dieison; Povala, Guilherme; Amaral, Livia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                          2014 IEEE International Symposium on Circuits and Systems (ISCAS) \u00b7 2014 \u00b7 Melbourne VIC, p. 2624\u20132627 DOI: 10.1109\/ISCAS.2014.6865711<\/a><\/span><\/div>\n<\/li>\n
                                                                        6. \n
                                                                          Hardware Design for HEVC-based Adaptive Loop Filter<\/div>\n
                                                                          Campos, A.; Conceicao, R.; Zatt, Bruno; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                                                          SForum 2014 – Student Forum on Microelectronics \u00b7 2014 \u00b7 Aracaj\u00fa, p. 1\u20134 <\/div>\n<\/li>\n
                                                                        7. \n
                                                                          HEVC Fractional Motion Estimation complexity reduction for real-time applications<\/div>\n
                                                                          Maich, Henrique; Afonso, Vladimir; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                          2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2014 \u00b7 Santiago, p. 1\u20134 DOI: 10.1109\/LASCAS.2014.6820302<\/a><\/span><\/div>\n<\/li>\n
                                                                        8. \n
                                                                          Four-step algorithm for early termination in HEVC inter-frame prediction based on decision trees<\/div>\n
                                                                          Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                          2014 Visual Communications and Image Processing (VCIP) \u00b7 2014 \u00b7 Valletta, p. 65\u201368 DOI: 10.1109\/vcip.2014.7051505<\/a><\/span><\/div>\n<\/li>\n
                                                                        9. \n
                                                                          Cost Function Optimization and its Hardware Design for the Sample Adaptive Offset of HEVC Standard<\/div>\n
                                                                          Rediess, Fabiane; Conceicao, Ruhan; Zatt, Bruno; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                          22th European Signal Processing Conference (EUSIPCO) \u00b7 2014 \u00b7 Lisboa, p. 206\u2013210 <\/div>\n<\/li>\n
                                                                        10. \n
                                                                          Configurable hardware design for the HEVC-based Adaptive Loop Filter<\/div>\n
                                                                          Conceicao, Ruhan; Rediess, Fabiane; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2014 \u00b7 Santiago, p. 1\u20134 DOI: 10.1109\/LASCAS.2014.6820308<\/a><\/span><\/div>\n<\/li>\n
                                                                        11. \n
                                                                          Complexity reduction of depth intra coding for 3D video extension of HEVC<\/div>\n
                                                                          Da Silva, Thaisa L.; Agostini, Luciano V.<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                          2014 Visual Communications and Image Processing (VCIP) \u00b7 2014 \u00b7 Valletta, p. 229\u2013232 DOI: 10.1109\/VCIP.2014.7051546<\/a><\/span><\/div>\n<\/li>\n
                                                                        12. \n
                                                                          Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm<\/div>\n
                                                                          Sanchez, Gustavo; Saldanha, Mario; Balota, Gabriel; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 IEEE International Conference on Image Processing (ICIP) \u00b7 2014 \u00b7 Paris, p. 3209\u20133213 DOI: 10.1109\/ICIP.2014.7025649<\/a><\/span><\/div>\n<\/li>\n
                                                                        13. \n
                                                                          Classification-based early termination for coding tree structure decision in HEVC<\/div>\n
                                                                          Correa, Guilherme; Assuncao, Pedro; Da Silva Cruz, Luis A.; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) \u00b7 2014 \u00b7 Marseille, p. 239\u20134 DOI: 10.1109\/icecs.2014.7049966<\/a><\/span><\/div>\n<\/li>\n
                                                                        14. \n
                                                                          Arquitetura VLSI de Baixa Pot\u00eancia para um Compressor de Quadros de Refer\u00eancia<\/div>\n
                                                                          Silveira, D.; Povala, G.; Amaral, L.; Zatt, Bruno; Agostini, L. V.<\/strong>; Porto, Marcelo<\/div>\n
                                                                          XVI Encontro de P\u00f3s-Gradua\u00e7\u00e3o da UFPel \u00b7 2014 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                        15. \n
                                                                          An efficient reference frame compression approach for video coding systems<\/div>\n
                                                                          Povala, Guilherme; Silveira, Dieison; Amaral, Livia; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2014 \u00b7 Santiago, p. 1\u20134 DOI: 10.1109\/LASCAS.2014.6820296<\/a><\/span><\/div>\n<\/li>\n
                                                                        16. \n
                                                                          A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders<\/div>\n
                                                                          Silveira, Dieison; Povala, Guilherme; Amaral, Livia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                          2014 IEEE International Conference on Image Processing (ICIP) \u00b7 2014 \u00b7 Paris, p. 5641\u20135645 DOI: 10.1109\/ICIP.2014.7026141<\/a><\/span><\/div>\n<\/li>\n
                                                                        17. \n
                                                                          A low-complexity and lossless reference frame encoder algorithm for video coding<\/div>\n
                                                                          Silveira, Dieison; Povala, Guilherme; Amaral, Livia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                          ICASSP 2014 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) \u00b7 2014 \u00b7 Florence, p. 7358\u20137362 DOI: 10.1109\/ICASSP.2014.6855029<\/a><\/span><\/div>\n<\/li>\n
                                                                        18. \n
                                                                          A complexity reduction algorithm for depth maps intra prediction on the 3D-HEVC<\/div>\n
                                                                          Sanchez, Gustavo; Saldanha, Mario; Balota, Gabriel; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          2014 Visual Communications and Image Processing (VCIP) \u00b7 2014 \u00b7 Valletta, p. 137\u2013140 DOI: 10.1109\/vcip.2014.7051523<\/a><\/span><\/div>\n<\/li>\n
                                                                        19. \n
                                                                          A Real-Time 5-Views HD 1080p Architecture for 3D-HEVC Depth Modeling Mode 4<\/div>\n
                                                                          Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                          the 27th Symposium \u00b7 2014 \u00b7 Aracaju, p. 1\u20136 DOI: 10.1145\/2660540.2661002<\/a><\/span><\/div>\n<\/li>\n
                                                                        20. \n
                                                                          A Method for Early-Splitting of HEVC Inter Blocks Based on Decision Trees<\/div>\n
                                                                          Corr\u00eaa, G.; Assuncao, Pedro; Agostini, L. V.<\/strong>; Cruz, Luis A.<\/div>\n
                                                                          22th European Signal Processing Conference (EUSIPCO) \u00b7 2014 \u00b7 Lisboa, p. 276\u2013280 <\/div>\n<\/li>\n
                                                                        21. \n
                                                                          A Memory Energy Consumption Analysis of Motion Estimation Algorithms using Data Reuse in Video Coding Systems<\/div>\n
                                                                          Amaral, L\u00edvia; Silveira, Dieison; Povala, Guilherme; Agostini, Luciano<\/strong>; Porto, Marcelo; Zatt, Bruno<\/div>\n
                                                                          the 27th Symposium \u00b7 2014 \u00b7 Aracaju, p. 1\u20136 DOI: 10.1145\/2660540.2660999<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                          Cap\u00edtulos de livros (1)<\/span><\/h3>\n
                                                                            \n
                                                                          1. \n
                                                                            Computational Resource Management for Video Coding in Mobile Environments<\/div>\n
                                                                            Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                            In: Modeling and Optimization in Science and Technologies \u00b7 2014 \u00b7 Springer International Publishing, p. 515\u2013549, ISBN 9783319067032 DOI: 10.1007\/978-3-319-06704-9_24<\/a> Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                            \n2013 (28 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                            \n

                                                                            Artigos em peri\u00f3dicos (3)<\/span><\/h3>\n
                                                                              \n
                                                                            1. \n
                                                                              Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos<\/div>\n
                                                                              Porto, Marcelo Schiavon; Agostini, L. V.<\/strong>; Cristani, C. R.; Oglio, P. D.; Silva, M. G.; Matos, J. C. B.; Bampi, Sergio<\/div>\n
                                                                              Multimedia Tools and Applications \u00b7 2013 \u00b7 v. 63, p. 107\u2013127 DOI: 10.1007\/s11042-012-1033-0<\/a><\/span><\/div>\n<\/li>\n
                                                                            2. \n
                                                                              Implementation and Performance Evaluation of a Media Decoder with Hardware Acceleration Support Targeting High Definition Streams in the SBTVD Ginga Middleware<\/div>\n
                                                                              Goncalves, J. L.; Trojan, T.; Marques, F.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                              J INTERNET TECHNOL \u00b7 2013 \u00b7 v. 14, p. 273\u2013280 <\/div>\n<\/li>\n
                                                                            3. \n
                                                                              A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264\/AVC High 4:2:2 profile<\/div>\n
                                                                              Zatt, Bruno; Lima, L. M.; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                              Journal of Real-Time Image Processing (Print) \u00b7 2013 \u00b7 v. 8, p. 127\u2013140 DOI: 10.1007\/s11554-011-0216-7<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                              Trabalhos em eventos (25)<\/span><\/h3>\n
                                                                                \n
                                                                              1. \n
                                                                                Speeding Up HEVC Intra Coding Based on Tree Depth Inter-levels Correlation Structure<\/div>\n
                                                                                Silva, Tha\u00edsa Leal da; Agostini, L. V.<\/strong>; Cruz, Luis A. da Silva<\/div>\n
                                                                                EUSIPCO 2013 – European Signal Processing Conference \u00b7 2013 \u00b7 Marrakesh, p. 1\u20135 <\/div>\n<\/li>\n
                                                                              2. \n
                                                                                Simplified HEVC FME Interpolation Unit Targeting a Low Cost and High Throughput Hardware Design<\/div>\n
                                                                                Afonso, Vladimir; Maich, Henrique; Agostini, Luciano<\/strong>; Franco, Denis<\/div>\n
                                                                                2013 Data Compression Conference (DCC) \u00b7 2013 \u00b7 Snowbird, p. 473 DOI: 10.1109\/DCC.2013.55<\/a><\/span><\/div>\n<\/li>\n
                                                                              3. \n
                                                                                Low cost and high throughput FME interpolation for the HEVC emerging video coding standard<\/div>\n
                                                                                Afonso, Vladimir; Maich, Henrique; Agostini, Luciano<\/strong>; Franco, Denis<\/div>\n
                                                                                2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2013 \u00b7 Cusco, p. 1\u20134 DOI: 10.1109\/LASCAS.2013.6519017<\/a><\/span><\/div>\n<\/li>\n
                                                                              4. \n
                                                                                Inter-view prediction of coding tree depth for HEVC-based multiview video coding<\/div>\n
                                                                                Da Silva, Thaisa Leal; Da Silva Cruz, Luis A.; Agostini, Luciano V.<\/strong><\/div>\n
                                                                                2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS) \u00b7 2013 \u00b7 Abu Dhabi, p. 165\u2013168 DOI: 10.1109\/ICECS.2013.6815380<\/a><\/span><\/div>\n<\/li>\n
                                                                              5. \n
                                                                                High throughput hardware design for the HEVC Fractional Motion Estimation Interpolation Unit<\/div>\n
                                                                                Maich, Henrique; Afonso, Vladimir; Franco, Denis; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS) \u00b7 2013 \u00b7 Abu Dhabi, p. 161\u2013164 DOI: 10.1109\/ICECS.2013.6815379<\/a><\/span><\/div>\n<\/li>\n
                                                                              6. \n
                                                                                Hardware design for the 32\u00d732 IDCT of the HEVC video coding standard<\/div>\n
                                                                                Conceicao, Ruhan; Souza, J. Claudio; Jeske, Ricardo; Porto, Marcelo; Mattos, Julio; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) \u00b7 2013 \u00b7 Curitiba, p. 1\u20136 DOI: 10.1109\/SBCCI.2013.6644881<\/a><\/span><\/div>\n<\/li>\n
                                                                              7. \n
                                                                                HEVC intra mode decision acceleration based on tree depth levels relationship<\/div>\n
                                                                                Da Silva, Thaisa Leal; Da Silva Cruz, Luis A.; Agostini, Luciano V.<\/strong><\/div>\n
                                                                                2013 Picture Coding Symposium (PCS) \u00b7 2013 \u00b7 San Jose, p. 277\u2013280 DOI: 10.1109\/PCS.2013.6737737<\/a><\/span><\/div>\n<\/li>\n
                                                                              8. \n
                                                                                HEVC Intra Coding Acceleration Based on Tree Inter-level Mode Correlation<\/div>\n
                                                                                Silva, Thaisa Leal da; Agostini, L. V.<\/strong>; Cruz, Luis A. da Silva<\/div>\n
                                                                                SPA 2013 – 18th IEEE Signal Processing: Algorithms, Architectures, Arrangements, and Applications Conference \u00b7 2013 \u00b7 Poznan, p. 88\u201393 <\/div>\n<\/li>\n
                                                                              9. \n
                                                                                Fast HEVC intra mode decision algorithm based on new evaluation order in the Coding Tree Block<\/div>\n
                                                                                Palomino, Daniel; Cavichioli, Eduardo; Susin, Altamiro; Agostini, Luciano<\/strong>; Shafique, Muhammad; Henkel, Jorg<\/div>\n
                                                                                2013 Picture Coding Symposium (PCS) \u00b7 2013 \u00b7 San Jose, p. 209\u2013212 DOI: 10.1109\/PCS.2013.6737720<\/a><\/span><\/div>\n<\/li>\n
                                                                              10. \n
                                                                                Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding<\/div>\n
                                                                                Sampaio, Felipe; Zatt, Bruno; Shafique, Muhammad; Agostini, Luciano<\/strong>; Bampi, Sergio; Henkel, Jorg<\/div>\n
                                                                                Design Automation and Test in Europe \u00b7 2013 \u00b7 Grenoble, p. 665\u2013670 DOI: 10.7873\/DATE.2013.144<\/a><\/span><\/div>\n<\/li>\n
                                                                              11. \n
                                                                                Energy-Efficient Memory Hierarchy for Motion and Disparity Estimation in Multiview Video Coding<\/div>\n
                                                                                Sampaio, Felipe; Zatt, Bruno; Agostini, L. V.<\/strong>; Bampi, S.<\/div>\n
                                                                                XXVIII Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2013 \u00b7 Porto Alegre, p. 1\u20134 <\/div>\n<\/li>\n
                                                                              12. \n
                                                                                ES&amp;IS: Enhanced Spread and Iterative Search hardware-friendly motion estimation algorithm for the HEVC Standard<\/div>\n
                                                                                Sanchez, Gustavo; Zatt, Bruno; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS) \u00b7 2013 \u00b7 Abu Dhabi, p. 941\u2013944 DOI: 10.1109\/ICECS.2013.6815567<\/a><\/span><\/div>\n<\/li>\n
                                                                              13. \n
                                                                                Desenvolvimento em Hardware de Arquiteturas Otimizadas para as Transformadas Discretas dos Cossenos Segundo o Padr\u00e3o HEVC de Codifica\u00e7\u00e3o de V\u00eddeo<\/div>\n
                                                                                Souza, J. Claudio; Conceicao, R.; Zatt, Bruno; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                                                                XXII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2013 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                              14. \n
                                                                                Desenvolvimento de Arquitetura para Estima\u00e7\u00e3o de Movimento Fracion\u00e1ria do Padr\u00e3o HEVC<\/div>\n
                                                                                Maich, H.; Afonso, V.; Zatt, Bruno; Agostini, L. V.<\/strong>; Porto, Marcelo<\/div>\n
                                                                                XXII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2013 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                              15. \n
                                                                                Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding<\/div>\n
                                                                                Sampaio, Felipe; Zatt, Bruno; Shafique, Muhammad; Agostini, Luciano<\/strong>; Henkel, Jorg; Bampi, Sergio<\/div>\n
                                                                                2013 20th IEEE International Conference on Image Processing (ICIP) \u00b7 2013 \u00b7 Melbourne, p. 1831\u20131835 DOI: 10.1109\/ICIP.2013.6738377<\/a><\/span><\/div>\n<\/li>\n
                                                                              16. \n
                                                                                Constrained encoding structures for computational complexity scalability in HEVC<\/div>\n
                                                                                Correa, Guilherme; Assuncao, Pedro; Da Silva Cruz, Luis A.; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 Picture Coding Symposium (PCS) \u00b7 2013 \u00b7 San Jose, p. 297\u2013300 DOI: 10.1109\/PCS.2013.6737742<\/a><\/span><\/div>\n<\/li>\n
                                                                              17. \n
                                                                                Computational complexity control for HEVC based on coding tree spatio-temporal correlation<\/div>\n
                                                                                Correa, Guilherme; Assuncao, Pedro; Da Silva Cruz, Luis A.; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS) \u00b7 2013 \u00b7 Abu Dhabi, p. 937\u2013940 DOI: 10.1109\/ICECS.2013.6815566<\/a><\/span><\/div>\n<\/li>\n
                                                                              18. \n
                                                                                Complexity control of HEVC through quadtree depth estimation<\/div>\n
                                                                                Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                                IEEE EUROCON 2013 \u00b7 2013 \u00b7 Zagreb, p. 81\u201386 DOI: 10.1109\/EUROCON.2013.6624969<\/a><\/span><\/div>\n<\/li>\n
                                                                              19. \n
                                                                                Coding Tree Depth Estimation for Complexity Reduction of HEVC<\/div>\n
                                                                                Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Cruz, Luis A. da Silva<\/div>\n
                                                                                2013 Data Compression Conference (DCC) \u00b7 2013 \u00b7 Snowbird, p. 43\u201352 DOI: 10.1109\/DCC.2013.12<\/a><\/span><\/div>\n<\/li>\n
                                                                              20. \n
                                                                                An energy-efficient hardware design for lossless reference frame compression in video coders<\/div>\n
                                                                                Silveira, Dieison; Povala, Guilherme; Amaral, Livia; Zatt, Bruno; Agostini, Luciano<\/strong>; Porto, Marcelo<\/div>\n
                                                                                2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS) \u00b7 2013 \u00b7 Abu Dhabi, p. 573\u2013576 DOI: 10.1109\/ICECS.2013.6815479<\/a><\/span><\/div>\n<\/li>\n
                                                                              21. \n
                                                                                An adaptive workload management scheme for HEVC encoding<\/div>\n
                                                                                Grellert, Mateus; Shafique, Muhammad; Khan, Muhammad Usman Karim; Agostini, Luciano<\/strong>; Mattos, Julio C. B.; Henkel, Jorg<\/div>\n
                                                                                2013 20th IEEE International Conference on Image Processing (ICIP) \u00b7 2013 \u00b7 Melbourne, p. 1850\u20131854 DOI: 10.1109\/ICIP.2013.6738381<\/a><\/span><\/div>\n<\/li>\n
                                                                              22. \n
                                                                                A real time high definition architecture for the Variable-Length Reference Frame Decoder<\/div>\n
                                                                                Silveira, Dieison; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2013 \u00b7 Cusco, p. 1\u20134 DOI: 10.1109\/LASCAS.2013.6519062<\/a><\/span><\/div>\n<\/li>\n
                                                                              23. \n
                                                                                A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture<\/div>\n
                                                                                Silveira, Dieison; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                                                                ICME 2013 – IEEE International Conference on Multimedia and Expo \u00b7 2013 \u00b7 San Jose, p. 1\u20136 DOI: 10.1109\/ICME.2013.6607434<\/a><\/span><\/div>\n<\/li>\n
                                                                              24. \n
                                                                                A hardware friedly motion estimation algorithm for the emergent HEVC standard and its low power hardware design<\/div>\n
                                                                                Sanchez, Gustavo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 20th IEEE International Conference on Image Processing (ICIP) \u00b7 2013 \u00b7 Melbourne, p. 1991\u20131994 DOI: 10.1109\/ICIP.2013.6738410<\/a><\/span><\/div>\n<\/li>\n
                                                                              25. \n
                                                                                A fast hardware-friendly motion estimation algorithm and its VLSI design for real time ultra high definition applications<\/div>\n
                                                                                Sanchez, Gustavo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) \u00b7 2013 \u00b7 Cusco, p. 1\u20134 DOI: 10.1109\/LASCAS.2013.6518986<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                \n2012 (36 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                \n

                                                                                Artigos em peri\u00f3dicos (13)<\/span><\/h3>\n
                                                                                  \n
                                                                                1. \n
                                                                                  Uma Arquitetura R\u00e1pida de Somador Bin\u00e1rio de Alta Efici\u00eancia Energ\u00e9tica<\/div>\n
                                                                                  Monteiro, Jucemar Luis; Agostini, L. V.<\/strong>; G\u00fcntzel, J. L.; G\u00fcntzel, J. L. A.<\/div>\n
                                                                                  Revista Eletr\u00f4nica de Inicia\u00e7\u00e3o Cient\u00edfica \u00b7 2012 \u00b7 v. 12, p. 1\u201311 <\/div>\n<\/li>\n
                                                                                2. \n
                                                                                  Sample-Level Filtering Order for High-Throughput and Memory-Aware H.264 Deblocking Filter<\/div>\n
                                                                                  Corr\u00eaa, Guilherme Ribeiro; Agostini, L. V.<\/strong>; Cruz, Lu\u00eds Alberto<\/div>\n
                                                                                  ISRN Signal Processing \u00b7 2012 \u00b7 v. 2012, p. 1\u20136 DOI: 10.5402\/2012\/805346<\/a><\/span><\/div>\n<\/li>\n
                                                                                3. \n
                                                                                  Power efficient SDS motion estimation architecture using dynamic iteration control and hierarchical adder compressors for real time HDTV video coding<\/div>\n
                                                                                  Porto, Marcelo Schiavon; Altermann, J.; Costa, Eduardo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                  Analog Integrated Circuits and Signal Processing \u00b7 2012 \u00b7 v. 73, p. 919\u2013930 DOI: 10.1007\/s10470-012-9938-0<\/a><\/span><\/div>\n<\/li>\n
                                                                                4. \n
                                                                                  Performance and Computational Complexity Assessment of High-Efficiency Video Encoders<\/div>\n
                                                                                  Corr\u00eaa, Guilherme Ribeiro; Assuncao, P. A.; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                  IEEE Transactions on Circuits and Systems for Video Technology (Print) \u00b7 2012 \u00b7 v. 22, p. 1899\u20131909 DOI: 10.1109\/tcsvt.2012.2223411<\/a><\/span><\/div>\n<\/li>\n
                                                                                5. \n
                                                                                  Optimizing transistor networks using a graph-based technique<\/div>\n
                                                                                  Possani, V. N.; Souza, R. S.; Domingues, J. S.; Agostini, L. V.<\/strong>; Marques, F.; Rosa Jr, L. S.<\/div>\n
                                                                                  Analog Integrated Circuits and Signal Processing \u00b7 2012 \u00b7 v. 73, p. 841\u2013850 DOI: 10.1007\/s10470-012-9874-z<\/a><\/span><\/div>\n<\/li>\n
                                                                                6. \n
                                                                                  New Motion Estimation Algorithms and its VLSI architectures for Real Time High Definition Video Coding<\/div>\n
                                                                                  Porto, Marcelo Schiavon; Bampi, Sergio; Sanchez, G.; Noble, Diego; Agostini, L. V.<\/strong><\/div>\n
                                                                                  JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2012 \u00b7 v. 7, p. 37\u201346 DOI: 10.29292\/jics.v7i1.354<\/a><\/span><\/div>\n<\/li>\n
                                                                                7. \n
                                                                                  MSBSD: Um Algoritmo para Decis\u00e3o R\u00e1pida na Inter-Predi\u00e7\u00e3o em Codificadores HEVC<\/div>\n
                                                                                  Silva, M. G.; Sampaio, Felipe; Agostini, L. V.<\/strong>; Mattos, J\u00falio<\/div>\n
                                                                                  Revista Eletr\u00f4nica de Inicia\u00e7\u00e3o Cient\u00edfica \u00b7 2012 \u00b7 v. 12, p. 30811 <\/div>\n<\/li>\n
                                                                                8. \n
                                                                                  Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264\/AVC Video Encoder<\/div>\n
                                                                                  Corr\u00eaa, Guilherme Ribeiro; Palomino, Daniel; Diniz, Cl\u00e1udio Machdo; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                  VLSI Design \u00b7 2012 \u00b7 v. 2012, p. 1\u201320 DOI: 10.1155\/2012\/748019<\/a><\/span><\/div>\n<\/li>\n
                                                                                9. \n
                                                                                  Hardware design focusing in the tradeoff cost versus quality for the H.264\/AVC fractional motion estimation targeting high definition videos<\/div>\n
                                                                                  Sanchez, G.; Correa, M. M.; Noble, Diego; Porto, Marcelo Schiavon; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                  Analog Integrated Circuits and Signal Processing \u00b7 2012 \u00b7 v. 73, p. 931\u2013944 DOI: 10.1007\/s10470-012-9944-2<\/a><\/span><\/div>\n<\/li>\n
                                                                                10. \n
                                                                                  Evaluating two implementations of the component responsible for decoding video and audio in the Brazilian digital TV middleware<\/div>\n
                                                                                  Trojan, T.; Goncalves, J. L.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                  Multimedia Tools and Applications \u00b7 2012 \u00b7 v. 57, p. 373\u2013392 DOI: 10.1007\/s11042-011-0753-x<\/a><\/span><\/div>\n<\/li>\n
                                                                                11. \n
                                                                                  DMPDS: A Fast Motion Estimation Algorithm Targeting High Resolution Videos and Its FPGA Implementation<\/div>\n
                                                                                  Sanchez, G.; Sampaio, Felipe Martin; Porto, Marcelo; Bampi, S\u00e9rgio; Agostini, L. V.<\/strong><\/div>\n
                                                                                  International Journal of Reconfigurable Computing (Print) \u00b7 2012 \u00b7 v. 2012, p. 1\u201312 DOI: 10.1155\/2012\/186057<\/a><\/span><\/div>\n<\/li>\n
                                                                                12. \n
                                                                                  Algorithm and Hardware Design of a Fast Intra Frame Mode Decision Module for H.264\/AVC Encoders<\/div>\n
                                                                                  Palomino, D. M.; Corr\u00eaa, G.; Diniz, C.; Agostini, L. V.<\/strong>; Bampi, S\u00e9rgio; Susin, A.<\/div>\n
                                                                                  International Journal of Reconfigurable Computing (Print) \u00b7 2012 \u00b7 v. 2012, p. 1\u201310 DOI: 10.1155\/2012\/813023<\/a><\/span><\/div>\n<\/li>\n
                                                                                13. \n
                                                                                  A Memory Hierarchy Model Based on Data Reuse for Full-Search Motion Estimation on High-Definition Digital Videos<\/div>\n
                                                                                  Lopes, A. S. B.; Silva, Ivan Saraiva; Agostini, L. V.<\/strong><\/div>\n
                                                                                  International Journal of Reconfigurable Computing (Print) \u00b7 2012 \u00b7 v. 2012, p. 1\u201310 DOI: 10.1155\/2012\/473725<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                                  Trabalhos em eventos (22)<\/span><\/h3>\n
                                                                                    \n
                                                                                  1. \n
                                                                                    Very High Throughput FPGA Design for Vertical Rotational Transform of HEVC Emergent Video Coding Standard<\/div>\n
                                                                                    Vianna, H. A.; Anderson, V.; Sanchez, G.; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 69\u201374 DOI: 10.1109\/SPL.2012.6211797<\/a><\/span><\/div>\n<\/li>\n
                                                                                  2. \n
                                                                                    Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design<\/div>\n
                                                                                    Sanchez, G.; Agostini, L. V.<\/strong>; Sampaio, Felipe; Porto, Marcelo Schiavon; Bampi, Sergio<\/div>\n
                                                                                    ICME 2012 – IEEE International Conference on Multimedia & Expo \u00b7 2012 \u00b7 Melbourne, p. 1079\u20131084 DOI: 10.1109\/ICME.2012.53<\/a><\/span><\/div>\n<\/li>\n
                                                                                  3. \n
                                                                                    Real Time QHDTV Motion Estimation Architecture Design for DMPDS Algorithm<\/div>\n
                                                                                    Sanchez, G.; Porto, Marcelo Schiavon; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 27\u201332 DOI: 10.1109\/SPL.2012.6211765<\/a><\/span><\/div>\n<\/li>\n
                                                                                  4. \n
                                                                                    Projeto em Hardware com Baixo Custo e Elevada Taxa de Processamento para a Transformada DCT 16×16 do Padr\u00e3o Emergente de Codifica\u00e7\u00e3o de V\u00eddeos HEVC<\/div>\n
                                                                                    Jeske, R. G.; Souza Jr., J. C.; Conceicao, R.; Mattos, Julio; Agostini, L. V.<\/strong><\/div>\n
                                                                                    XIV Encontro de P\u00f3s Gradua\u00e7\u00e3o da UFPel \u00b7 2012 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                  5. \n
                                                                                    Projeto de Hardware Com Elevada Taxa de Processamento Para Estima\u00e7\u00e3o de Movimento Fracion\u00e1ria Segundo o Padr\u00e3o HEVC<\/div>\n
                                                                                    Afonso, V.; Agostini, L. V.<\/strong>; Franco, Denis<\/div>\n
                                                                                    XIV Encontro de P\u00f3s-Gradua\u00e7\u00e3o da UFPel \u00b7 2012 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                  6. \n
                                                                                    New Quarter Random Search Motion Estimation Algorithm: A Great Quality-Cost Trade-Off<\/div>\n
                                                                                    Cristani, Cassio; Dalloglio, Pargles; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SForum 2012 – Microelectronics Student Forum \u00b7 2012 \u00b7 Bras\u00edlia, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                  7. \n
                                                                                    NSP Kernel Finder – Uma Metodologia para Gera\u00e7\u00e3o de Redes de Transistores N\u00e3o-S\u00e9rie-Paralelas para a Tecnologia CMOS<\/div>\n
                                                                                    Possani, V. N.; Souza, R. S.; Agostini, L. V.<\/strong>; Marques, F.; Rosa Jr, L. S.<\/div>\n
                                                                                    XXI Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2012 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                  8. \n
                                                                                    Motion compensated tree depth limitation for complexity control of HEVC encoding<\/div>\n
                                                                                    Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis A.<\/div>\n
                                                                                    2012 19th IEEE International Conference on Image Processing (ICIP 2012) \u00b7 2012 \u00b7 Orlando, p. 217\u2013220 DOI: 10.1109\/ICIP.2012.6466834<\/a><\/span><\/div>\n<\/li>\n
                                                                                  9. \n
                                                                                    Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter&#8208;Prediction of HEVC Encoders<\/div>\n
                                                                                    Sampaio, Felipe; Bampi, Sergio; Silva, M. G.; Agostini, L. V.<\/strong>; Matos, J. C. B.<\/div>\n
                                                                                    ICME 2012 – IEEE International Conference on Multimedia & Expo \u00b7 2012 \u00b7 Melbourne, p. 657\u2013662 DOI: 10.1109\/ICME.2012.37<\/a><\/span><\/div>\n<\/li>\n
                                                                                  10. \n
                                                                                    Memory Efficient FPGA Implementation of Motion and Disparity Estimation for the Multiview Video Coding<\/div>\n
                                                                                    Sampaio, Felipe; Zatt, Bruno; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 45\u201350 DOI: 10.1109\/SPL.2012.6211799<\/a><\/span><\/div>\n<\/li>\n
                                                                                  11. \n
                                                                                    Memory Bandwidth Reduction in Video Coding Systems Through Context Adaptive Lossless Reference Frame Compression<\/div>\n
                                                                                    Silveira, D.; Sanchez, G.; Silva, M. G.; Possani, V. N.; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 21\u201326 DOI: 10.1109\/SPL.2012.6211791<\/a><\/span><\/div>\n<\/li>\n
                                                                                  12. \n
                                                                                    Low Cost and High Throughput Multiplierless Design of a 16 Point 1-D DCT of the New HEVC Video Coding Standard<\/div>\n
                                                                                    Jeske, R. G.; Souza Jr., J. C.; Wrege, G.; Conceicao, R.; Silva, M. G.; Matos, J. C. B.; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 57\u201362 DOI: 10.1109\/SPL.2012.6211786<\/a><\/span><\/div>\n<\/li>\n
                                                                                  13. \n
                                                                                    High performance hardware architectures for the inverse Rotational Transform of the emerging HEVC standard<\/div>\n
                                                                                    Vianna, Henrique; Sanchez, Gustavo; Porto, Marcelo; Agostini, Luciano<\/strong><\/div>\n
                                                                                    2012 19th IEEE International Conference on Image Processing (ICIP 2012) \u00b7 2012 \u00b7 Orlando, p. 189\u2013192 DOI: 10.1109\/ICIP.2012.6466827<\/a><\/span><\/div>\n<\/li>\n
                                                                                  14. \n
                                                                                    High Throughput Hardware Design for the Adaptive Loop Filter of the Emerging HEVC Video Coding<\/div>\n
                                                                                    Rediess, Fabiane Konrad; Agostini, L. V.<\/strong>; Cristani, C. R.; Oglio, P. D.; Porto, Marcelo Schiavon<\/div>\n
                                                                                    SBCCI 2012 \u0096 25th Annual Symposium on Integrated Circuits and System Design \u00b7 2012 \u00b7 Bras\u00edlia, p. 1\u20135 DOI: 10.1109\/SBCCI.2012.6344446<\/a><\/span><\/div>\n<\/li>\n
                                                                                  15. \n
                                                                                    Fast HEVC Intra Prediction Mode Decision Based on Edge Direction Information<\/div>\n
                                                                                    Silva, Thaisa Leal da; Agostini, L. V.<\/strong>; Cruz, Lu\u00eds Alberto<\/div>\n
                                                                                    EUSIPCO 2012 – European Signal Processing Conference \u00b7 2012 \u00b7 Bucharest, p. 1214\u20131218 <\/div>\n<\/li>\n
                                                                                  16. \n
                                                                                    Fast HEVC Intra Mode Decision Based on Dominant Edge Evaluation and Tree Structure Dependencies<\/div>\n
                                                                                    Silva, Tha\u00edsa Leal da; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                    ICECS 2012 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2012 \u00b7 Sevilha, p. 568\u2013571 DOI: 10.1109\/ICECS.2012.6463683<\/a><\/span><\/div>\n<\/li>\n
                                                                                  17. \n
                                                                                    FPGA Based Design for Motion Vector Predicton in H.264\/AVC Encoders Targeting HD1080p Resolution<\/div>\n
                                                                                    Palomino, Daniel; Sampaio, Felipe; Bampi, Sergio; Susin, Altamiro; Agostini, L. V.<\/strong><\/div>\n
                                                                                    SPL 2012 – VIII Southern Programmable Logic Conference \u00b7 2012 \u00b7 Bento Gon\u00e7alves, p. 111\u2013116 DOI: 10.1109\/SPL.2012.6211785<\/a><\/span><\/div>\n<\/li>\n
                                                                                  18. \n
                                                                                    Dynamic Tree-Depth Adjustment for Low Power HEVC Encoders<\/div>\n
                                                                                    Corr\u00eaa, Guilherme Ribeiro; Assuncao, P. A.; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                    ICECS 2012 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2012 \u00b7 Sevilha, p. 564\u2013567 DOI: 10.1109\/ICECS.2012.6463684<\/a><\/span><\/div>\n<\/li>\n
                                                                                  19. \n
                                                                                    Adaptive Coding Tree for Complexity Control of High Efficiency Video Encoders<\/div>\n
                                                                                    Corr\u00eaa, Guilherme Ribeiro; Assuncao, P. A.; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                    PCS 2012 – Picture Coding Symposium 2012 \u00b7 2012 \u00b7 Crac\u00f3via, p. 425\u2013428 DOI: 10.1109\/PCS.2012.6213378<\/a><\/span><\/div>\n<\/li>\n
                                                                                  20. \n
                                                                                    A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard<\/div>\n
                                                                                    Palomino, Daniel; Sampaio, Felipe; Agostini, Luciano<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                    2012 19th IEEE International Conference on Image Processing (ICIP 2012) \u00b7 2012 \u00b7 Orlando, p. 201\u2013204 DOI: 10.1109\/ICIP.2012.6466830<\/a><\/span><\/div>\n<\/li>\n
                                                                                  21. \n
                                                                                    A high performance and low memory bandwidth architecture for motion estimation targeting high definition digital videos<\/div>\n
                                                                                    Lopes, A. S. B.; Silva, I. S.; Agostini, L. V.<\/strong><\/div>\n
                                                                                    2012 VIII Southern Conference on Programmable Logic (SPL) \u00b7 2012 \u00b7 Bento Goncalves, p. 1\u20134 DOI: 10.1109\/spl.2012.6211784<\/a><\/span><\/div>\n<\/li>\n
                                                                                  22. \n
                                                                                    A High Quality Hardware Friendly Motion Estimation Algorithm Focusing in HD Videos<\/div>\n
                                                                                    Oglio, P. D.; Cristani, Cassio; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                    ICECS 2012 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2012 \u00b7 Sevilha, p. 572\u2013575 DOI: 10.1109\/ICECS.2012.6463682<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                                    Livros publicados ou organizados (1)<\/span><\/h3>\n
                                                                                      \n
                                                                                    1. \n
                                                                                      SPL 2012 – VIII Southern Programmable Logic Conference<\/div>\n
                                                                                      Agostini, L. V.<\/strong>; Zeferino, C.; Boemo, E.; Glesner, M.<\/div>\n
                                                                                      IEEE \u00b7 Piscataway \u00b7 2012 \u00b7 ISBN 9781467301855, 254 p\u00e1ginas <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                      \n2011 (31 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                      \n

                                                                                      Artigos em peri\u00f3dicos (6)<\/span><\/h3>\n
                                                                                        \n
                                                                                      1. \n
                                                                                        Two fast multi-point search algorithms for high quality motion estimation in high resolution videos<\/div>\n
                                                                                        Porto, Marcelo Schiavon; Noble, Diego; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                        International Journal of Information Technology, Communications and Convergence \u00b7 2011 \u00b7 v. 1, p. 410 DOI: 10.1504\/ijitcc.2011.044643<\/a><\/span><\/div>\n<\/li>\n
                                                                                      2. \n
                                                                                        Galaxy Random Search: Algoritmo e Arquitetura para Estima\u00e7\u00e3o de Movimento em V\u00eddeos de Alta Defini\u00e7\u00e3o<\/div>\n
                                                                                        Cristani, C.; Dall’Oglio, Pargles; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                        Revista Eletr\u00f4nica de Inicia\u00e7\u00e3o Cient\u00edfica \u00b7 2011 \u00b7 v. 11, p. 23780 <\/div>\n<\/li>\n
                                                                                      3. \n
                                                                                        Complexity control of high efficiency video encoders for power-constrained devices<\/div>\n
                                                                                        Correa, Guilherme; Assuncao, Pedro; Agostini, Luciano<\/strong>; Da Silva Cruz, Luis<\/div>\n
                                                                                        IEEE Transactions on Consumer Electronics \u00b7 2011 \u00b7 v. 57, p. 1866\u20131874 DOI: 10.1109\/tce.2011.6131165<\/a><\/span><\/div>\n<\/li>\n
                                                                                      4. \n
                                                                                        A comparative analysis of media processing component implementations for the Brazilian digital TV middleware<\/div>\n
                                                                                        Trojan, T.; Goncalves, J. L.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                        International Journal of Information Technology, Communications and Convergence \u00b7 2011 \u00b7 v. 1, p. 391 DOI: 10.1504\/ijitcc.2011.044642<\/a><\/span><\/div>\n<\/li>\n
                                                                                      5. \n
                                                                                        A Novel Macroblock-Level Filtering Upsampling Architecture for H.264\/AVC Scalable Extension<\/div>\n
                                                                                        Silva, Tha\u00edsa Leal da; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                        JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGU\u00caS) \u00b7 2011 \u00b7 v. 6, p. 43\u201349 DOI: 10.29292\/jics.v6i1.337<\/a><\/span><\/div>\n<\/li>\n
                                                                                      6. \n
                                                                                        A High-Throughput Hardware Architecture for the H.264\/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos<\/div>\n
                                                                                        Correa, M. M.; Schoenknecht, M. T.; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                        International Journal of Reconfigurable Computing (Print) \u00b7 2011 \u00b7 v. 2011, p. 1\u20139 DOI: 10.1155\/2011\/254730<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                                        Trabalhos em eventos (25)<\/span><\/h3>\n
                                                                                          \n
                                                                                        1. \n
                                                                                          Two Novel Algorithms for High Quality Motion Estimation in High Definition Video Sequences<\/div>\n
                                                                                          Noble, Diego; Lamb, L.; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong>; Araujo, R.<\/div>\n
                                                                                          SIBGRAPI 2011 \u0096 Conference on Graphics, Patterns and Images \u00b7 2011 \u00b7 Alagoas, p. 197\u2013204 DOI: 10.1109\/SIBGRAPI.2011.42<\/a><\/span><\/div>\n<\/li>\n
                                                                                        2. \n
                                                                                          Test and Performance Analysis of Media Processing Implementations for the Middleware of Brazilian Digital TV System Using Different Scenarios<\/div>\n
                                                                                          Trojan, T.; Goncalves, J. L.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                          MUE 2011 – 5th FTRA International Conference on Multimedia and Ubiquitous Engineering \u00b7 2011 \u00b7 Creta, p. 95\u2013100 DOI: 10.1109\/MUE.2011.28<\/a><\/span><\/div>\n<\/li>\n
                                                                                        3. \n
                                                                                          SHBS: A Heuristic for Fast Inter Mode Decision of H.264\/AVC Standard Targeting VLSI Design<\/div>\n
                                                                                          Corr\u00eaa, Guilherme Ribeiro; Palomino, Daniel; Diniz, Cl\u00e1udio Machdo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                          ICME 2011 – IEEE International Conference on Multimedia & Expo \u00b7 2011 \u00b7 Barcelona, p. 1\u20134 DOI: 10.1109\/ICME.2011.6012097<\/a><\/span><\/div>\n<\/li>\n
                                                                                        4. \n
                                                                                          Run-Time Adaptive Energy-Aware Motion and Disparity Estimation in Multiview Video Coding<\/div>\n
                                                                                          Zatt, Bruno; Muhammad, S.; Sampaio, Felipe; Agostini, L. V.<\/strong>; Bampi, Sergio; Henkel, J.<\/div>\n
                                                                                          DAC2011 – 48th Design Automation Conference \u00b7 2011 \u00b7 San Diego, p. 1026\u20131031 <\/div>\n<\/li>\n
                                                                                        5. \n
                                                                                          Otimiza\u00e7\u00f5es em Redes de Transistores Usando uma Estrat\u00e9gia de Compartilhamento de Arestas em uma Estrutura de Grafo<\/div>\n
                                                                                          Possani, V. N.; Domingues, J. S.; Souza, R. S.; Agostini, L. V.<\/strong>; Marques, F.; Rosa Jr, L. S.<\/div>\n
                                                                                          CIC 2011 – XX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2011 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                        6. \n
                                                                                          Otimiza\u00e7\u00f5es em Redes de Transistores Usando um M\u00e9todo de Compartilhamento de Arestas em uma Estrutura de Grafo<\/div>\n
                                                                                          Possani, V. N.; Domingues, J. S.; Agostini, L. V.<\/strong>; Marques, F.; Rosa Jr, L. S.<\/div>\n
                                                                                          XX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPEL \u00b7 2011 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                        7. \n
                                                                                          Multilevel Data Reuse Scheme for Off-Chip Memory Accesses Reduction Applied to a Motion Estimation Architecture<\/div>\n
                                                                                          Silva, M. G.; Sampaio, Felipe; Matos, J. C. B.; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SIM 2011 – XXVI Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2011 \u00b7 S\u00e3o Leopoldo <\/div>\n<\/li>\n
                                                                                        8. \n
                                                                                          Implementation and Performance Evaluation of a Media Decoder with Hardware Acceleration Support Targeting High Definition Streams in the SBTVD Ginga Middleware<\/div>\n
                                                                                          Goncalves, J. L.; Trojan, T.; Matos, J. C. B.; Agostini, Luciano V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                          FTRA 2011 International Workshop on Advanced Future Multimedia Services (AFMS) \u00b7 2011 \u00b7 Jeju <\/div>\n<\/li>\n
                                                                                        9. \n
                                                                                          High efficient motion estimation architecture with integrated Motion Compensation and FME support<\/div>\n
                                                                                          Sanchez, G.; Noble, Diego; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                          LASCAS 2011 – II IEEE Latin American Symposium on Circuits and Systems \u00b7 2011 \u00b7 Bogot\u00e1, p. 1\u20134 DOI: 10.1109\/LASCAS.2011.5750265<\/a><\/span><\/div>\n<\/li>\n
                                                                                        10. \n
                                                                                          High Throughput 4×4 and 8×8 SATD Similarity Criteria Architectures for Video Coding Application<\/div>\n
                                                                                          Domingues, J. S.; Possani, V. N.; Silveira, D.; Rosa Jr, L. S.; Agostini, L. V.<\/strong><\/div>\n
                                                                                          Designers Forum of SPL 2011 – VII Southern Conference on Programmable Logic \u00b7 2011 \u00b7 C\u00f3rdoba <\/div>\n<\/li>\n
                                                                                        11. \n
                                                                                          Hardware Design for the New Galaxy Random Search Motion Estimation Algorithm Focusing in HD Videos<\/div>\n
                                                                                          Cristani, C. R.; Sanchez, G.; Oglio, P. D.; Agostini, L. V.<\/strong>; Porto, Marcelo Schiavon; Bampi, Sergio<\/div>\n
                                                                                          WCAS 2011 – 1st Workshop on Circuits and Systems \u00b7 2011 \u00b7 Jo\u00e3o Pessoa <\/div>\n<\/li>\n
                                                                                        12. \n
                                                                                          H.264\/AVC Eighth Pixel MC Chrominance interpolation hardware targeting very high resolution videos<\/div>\n
                                                                                          Schoenknecht, M. T.; Timm, E. F.; Rosa Jr, L. S.; Agostini, L. V.<\/strong><\/div>\n
                                                                                          LASCAS 2011 – II IEEE Latin American Symposium on Circuits and Systems \u00b7 2011 \u00b7 Bogot\u00e1, p. 1\u20134 DOI: 10.1109\/LASCAS.2011.5750288<\/a><\/span><\/div>\n<\/li>\n
                                                                                        13. \n
                                                                                          Arquitetura para Estima\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC com Algoritmo Diamond Search e Precis\u00e3o de Quarterpixel<\/div>\n
                                                                                          Correa, M. M.; Sanchez, G.; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                          CIC 2011 – XX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2011 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                        14. \n
                                                                                          Arquitetura para Estima\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC com Algoritmo Diamond Search e Precis\u00e3o de Quarter-Pixel<\/div>\n
                                                                                          Correa, M. M.; Sanchez, G.; Porto, Marcelo; Agostini, L. V.<\/strong><\/div>\n
                                                                                          XX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2011 \u00b7 Pelotas, p. 1\u20134 <\/div>\n<\/li>\n
                                                                                        15. \n
                                                                                          An Efficient Memory Hierarchy for Full Search Motion Estimation on High Definition Digital Videos<\/div>\n
                                                                                          Lopes, A. S. B.; Silva, Ivan Saraiva; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SBCCI 2011 – 24th Annual Symposium on Integrated Circuits and System Design \u00b7 2011 \u00b7 Jo\u00e3o Pessoa, p. 131\u2013136 DOI: 10.1145\/2020876.2020907<\/a><\/span><\/div>\n<\/li>\n
                                                                                        16. \n
                                                                                          An Efficient ME Architecture for High Definition Videos Using the New MPDS Algorithm<\/div>\n
                                                                                          Porto, Marcelo Schiavon; Bampi, Sergio; Sanchez, G.; Noble, Diego; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SBCCI 2011 – 24th Annual Symposium on Integrated Circuits and System Design \u00b7 2011 \u00b7 Jo\u00e3o Pessoa, p. 119\u2013124 DOI: 10.1145\/2020876.2020905<\/a><\/span><\/div>\n<\/li>\n
                                                                                        17. \n
                                                                                          Algorithm and Hardware Design of a Fast Intra-Frame Mode Decision Module for H.264\/AVC Encoders<\/div>\n
                                                                                          Palomino, Daniel; Corr\u00eaa, Guilherme Ribeiro; Diniz, Cl\u00e1udio Machdo; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SBCCI 2011 – 24th Annual Symposium on Integrated Circuits and System Design \u00b7 2011 \u00b7 Jo\u00e3o Pessoa, p. 143\u2013148 DOI: 10.1145\/2020876.2020909<\/a><\/span><\/div>\n<\/li>\n
                                                                                        18. \n
                                                                                          A1CSA: An Energy-Efficient Fast Adder Architecture for Cell-Based VLSI Design<\/div>\n
                                                                                          Monteiro, J.; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                          ICECS 2011 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2011 \u00b7 Beirute, p. 442\u2013445 DOI: 10.1109\/ICECS.2011.6122308<\/a><\/span><\/div>\n<\/li>\n
                                                                                        19. \n
                                                                                          A real time and power efficient HDTV motion estimation architecture using adder-compressors<\/div>\n
                                                                                          Porto, Marcelo Schiavon; Bampi, Sergio; Altermann, J.; Costa, Eduardo; Agostini, L. V.<\/strong><\/div>\n
                                                                                          LASCAS 2011 – II IEEE Latin American Symposium on Circuits and Systems \u00b7 2011 \u00b7 Bogot\u00e1, p. 1\u20134 DOI: 10.1109\/LASCAS.2011.5750279<\/a><\/span><\/div>\n<\/li>\n
                                                                                        20. \n
                                                                                          A real time HDTV motion estimation architecture for the new MPDS algorithm<\/div>\n
                                                                                          Sanchez, G.; Noble, Diego; Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                          IEEE EUROCON 2011 \u00b7 2011 \u00b7 Lisboa, p. 1\u20134 DOI: 10.1109\/EUROCON.2011.5929249<\/a><\/span><\/div>\n<\/li>\n
                                                                                        21. \n
                                                                                          A graph-based technique to optimize transistor networks<\/div>\n
                                                                                          Possani, V. N.; Timm, E. F.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                          LASCAS 2011 – II IEEE Latin American Symposium on Circuits and Systems \u00b7 2011 \u00b7 Bogot\u00e1, p. 1\u20134 DOI: 10.1109\/LASCAS.2011.5750285<\/a><\/span><\/div>\n<\/li>\n
                                                                                        22. \n
                                                                                          A Multilevel Data Reuse Scheme for Motion Estimation and Its VLSI Design<\/div>\n
                                                                                          Silva, M. G.; Sampaio, Felipe; Matos, J. C. B.; Agostini, L. V.<\/strong><\/div>\n
                                                                                          ISCAS 2011 – IEEE International Symposium on Circuits and Systems \u00b7 2011 \u00b7 Rio de Janeiro, p. 583\u2013586 DOI: 10.1109\/ISCAS.2011.5937632<\/a><\/span><\/div>\n<\/li>\n
                                                                                        23. \n
                                                                                          A High Throughput H.264\/AVC Intra-Frame Encoding Loop Architecture for HD1080p<\/div>\n
                                                                                          Diniz, Cl\u00e1udio Machdo; Zatt, Bruno; Thiele, C.; Susin, Altamiro; Bampi, Sergio; Sampaio, Felipe; Palomino, Daniel; Agostini, L. V.<\/strong><\/div>\n
                                                                                          ISCAS 2011 – IEEE International Symposium on Circuits and Systems \u00b7 2011 \u00b7 Rio de Janeiro, p. 579\u2013582 DOI: 10.1109\/ISCAS.2011.5937631<\/a><\/span><\/div>\n<\/li>\n
                                                                                        24. \n
                                                                                          A H.264\/AVC Quarter-Pixel Motion Estimation Refinement Architecture Targeting High Resolution Video<\/div>\n
                                                                                          Correa, M. M.; Schoenknecht, M. T.; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SPL 2011 – VII Southern Programmable Logic Conference \u00b7 2011 \u00b7 C\u00f3rdoba, p. 131\u2013136 DOI: 10.1109\/SPL.2011.5782637<\/a><\/span><\/div>\n<\/li>\n
                                                                                        25. \n
                                                                                          A Fast Random Based Motion Estimation Search Algorithm<\/div>\n
                                                                                          Cristani, C. R.; Oglio, P. D.; Porto, Marcelo Schiavon; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                          SForum 2011 – Student Forum on Microelectronics \u00b7 2011 \u00b7 Jo\u00e3o Pessoa <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                          \n2010 (22 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                          \n

                                                                                          Artigos em peri\u00f3dicos (1)<\/span><\/h3>\n
                                                                                            \n
                                                                                          1. \n
                                                                                            High Throughput and Low Cost Architecture for the Forward Quantization of the H.264\/AVC Video Compression Standard<\/div>\n
                                                                                            Sampaio, Felipe; Palomino, Daniel; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                            CLEI Electronic Journal \u00b7 2010 \u00b7 v. 13, p. 5 <\/div>\n<\/li>\n<\/ol>\n

                                                                                            Trabalhos em eventos (20)<\/span><\/h3>\n
                                                                                              \n
                                                                                            1. \n
                                                                                              Variable Block Size Motion Estimation Architecture with Integrated Motion Compensation with Fast Bottom-Up Mode Decision for the H.264\/AVC Video Coding Standard<\/div>\n
                                                                                              Dornelles, Robson; Sampaio, Felipe; Agostini, L. V.<\/strong><\/div>\n
                                                                                              23rd Annual Symposium on Integrated Circuits and System Design \u00b7 2010 \u00b7 S\u00e3o Paulo, p. 186\u2013191 DOI: 10.1145\/1854153.1854199<\/a><\/span><\/div>\n<\/li>\n
                                                                                            2. \n
                                                                                              Timing and interface communication analysis of H.264\/AVC encoder using SystemC model<\/div>\n
                                                                                              Zatt, Bruno; Diniz, Cl\u00e1udio Machdo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                              VLSI-SoC 2010 – 18th IEEE\/IFIP VLSI System on Chip Conference \u00b7 2010 \u00b7 Madri, p. 235\u2013240 DOI: 10.1109\/VLSISOC.2010.5642666<\/a><\/span><\/div>\n<\/li>\n
                                                                                            3. \n
                                                                                              SOPTMIZER: Uma Ferramenta para Desenvolvimento de Redes de Transistores Usando uma Abordagem Baseada em Grafo<\/div>\n
                                                                                              Possani, V. N.; Timm, E. F.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                              CIC 2010 – XIX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2010 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                            4. \n
                                                                                              Motion Vector Predictor Architecture for H.264\/AVC Main Profile Targeting HDTV 1080p<\/div>\n
                                                                                              Valdez, F.; Zatt, Bruno; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                              LASCAS 2010 – IEEE Latin American Symposium on Circuits and Systems \u00b7 2010 \u00b7 Foz do Igua\u00e7\u00fa <\/div>\n<\/li>\n
                                                                                            5. \n
                                                                                              Memory-Aware Multiple Reference Frame Motion Estimation for the H.264\/AVC Standard<\/div>\n
                                                                                              Silva, M. G.; Sampaio, Felipe; Hecktheuer, B.; Matos, J. C. B.; Agostini, L. V.<\/strong><\/div>\n
                                                                                              ICECS 2010 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2010 \u00b7 Atenas, p. 581\u2013584 DOI: 10.1109\/ICECS.2010.5724577<\/a><\/span><\/div>\n<\/li>\n
                                                                                            6. \n
                                                                                              Interlayer Intra Prediction Architecture for Scalable Extension of H.264\/AVC Standard<\/div>\n
                                                                                              Silva, Tha\u00edsa Leal da; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                              REC2010 – VI Jornadas sobre Sistemas Reconfigur\u00e1veis \u00b7 2010 \u00b7 Aveiro <\/div>\n<\/li>\n
                                                                                            7. \n
                                                                                              Homogeneity and Distortion-Based Intra Mode Decision Architecture for H.264\/AVC<\/div>\n
                                                                                              Corr\u00eaa, Guilherme Ribeiro; Diniz, Cl\u00e1udio Machdo; Bampi, Sergio; Palomino, Daniel; Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong><\/div>\n
                                                                                              ICECS 2010 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2010 \u00b7 Atenas, p. 597\u2013600 DOI: 10.1109\/ICECS.2010.5724581<\/a><\/span><\/div>\n<\/li>\n
                                                                                            8. \n
                                                                                              Hardware Design for Fast Intermode Decision and for Residues Generaton in a Variable Block Size Motion Estimation Compliant with the H.264\/AVC Video Coding Standard<\/div>\n
                                                                                              Porto, Roger Endrigo Carvalho; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                              VI Southern Programmable Logic Conference \u00b7 2010 \u00b7 Porto de Galinhas, p. 183\u2013186 DOI: 10.1109\/SPL.2010.5483015<\/a><\/span><\/div>\n<\/li>\n
                                                                                            9. \n
                                                                                              Evaluating Two Implementations of the Component Responsible for Decoding Video and Audio in the Brazilian Digital TV Middleware<\/div>\n
                                                                                              Trojan, T.; Goncalves, J. L.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Rosa Jr, L. S.<\/div>\n
                                                                                              AFMS 2010 – FTRA International Workshop on Advanced Future Multimedia Services \u00b7 2010 \u00b7 Gwangju, Korea <\/div>\n<\/li>\n
                                                                                            10. \n
                                                                                              Efficiency Evaluation and Architecture Design of SSD Unities for the H.264\/AVC Standard<\/div>\n
                                                                                              Sanchez, G.; Sampaio, Felipe; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                              VI Southern Programmable Logic Conference \u00b7 2010 \u00b7 Porto de Galinhas, p. 171\u2013174 DOI: 10.1109\/SPL.2010.5483019<\/a><\/span><\/div>\n<\/li>\n
                                                                                            11. \n
                                                                                              Desenvolvimento e Valida\u00e7\u00e3o de um Player de V\u00eddeo para a TV Digital<\/div>\n
                                                                                              Beckmann, M.; Goncalves, J. L.; Diniz, E.; Agostini, L. V.<\/strong>; Brisolara, Lisane<\/div>\n
                                                                                              CIC 2010 – XIX Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2010 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                            12. \n
                                                                                              Desenvolvimento de uma Arquitetura para Interpola\u00e7\u00e3o de Half-Pixels segundo o padr\u00e3o H.264\/AVC<\/div>\n
                                                                                              Correa, M. M.; Schoenknecht, M. T.; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                              XVI Workshop Iberchip \u00b7 2010 \u00b7 Foz do Igua\u00e7u, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                            13. \n
                                                                                              Avalia\u00e7\u00e3o de Efici\u00eancia e Desenvolvimento de Arquiteturas para o C\u00e1lculo do SSD Segundo o Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                              Sampaio, Felipe; Sanchez, G.; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                              XVI Workshop Iberchip \u00b7 2010 \u00b7 Foz do Igua\u00e7u, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                            14. \n
                                                                                              Arquitetura em Hardware para a Estima\u00e7\u00e3o de Movimento de Blocos de Tamanhos Vari\u00e1veis do Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                              Porto, Roger Endrigo Carvalho; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                              XVI Workshop Iberchip \u00b7 2010 \u00b7 Foz do Igua\u00e7u, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                            15. \n
                                                                                              A Novel Macroblock-level Filtering Upsampling Architecture for H.264\/AVC Scalable Extension<\/div>\n
                                                                                              Silva, Tha\u00edsa Leal da; Cruz, Lu\u00eds Alberto; Agostini, L. V.<\/strong><\/div>\n
                                                                                              SBCCI 2010 – 23rd Annual Symposium on Integrated Circuits and System Design \u00b7 2010 \u00b7 S\u00e3o Paulo, p. 163\u2013167 DOI: 10.1145\/1854153.1854194<\/a><\/span><\/div>\n<\/li>\n
                                                                                            16. \n
                                                                                              A Media Processing Implementation using Libvlc for the Ginga Middleware<\/div>\n
                                                                                              Trojan, T.; Goncalves, J. L.; Matos, J. C. B.; Rosa Jr, L. S.; Agostini, L. V.<\/strong><\/div>\n
                                                                                              FutureTech 2010 – V IEEE International Conference on Future Information Technology \u00b7 2010 \u00b7 Busan, p. 1\u20136 DOI: 10.1109\/FUTURETECH.2010.5482748<\/a><\/span><\/div>\n<\/li>\n
                                                                                            17. \n
                                                                                              A Low Cost Real Time Motion Estimation\/Compensation Architecture for the H.264\/AVC Video Coding Standard<\/div>\n
                                                                                              Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                              SIM 2010 – XXV Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2010 \u00b7 Porto Alegre <\/div>\n<\/li>\n
                                                                                            18. \n
                                                                                              A High Performance Hardware Architecture for the H.264\/AVC Half-Pixel Motion Estimation Refinement<\/div>\n
                                                                                              Correa, M. M.; Schoenknecht, M. T.; Agostini, L. V.<\/strong><\/div>\n
                                                                                              23rd Annual Symposium on Integrated Circuits and System Design \u00b7 2010 \u00b7 S\u00e3o Paulo, p. 151\u2013156 DOI: 10.1145\/1854153.1854192<\/a><\/span><\/div>\n<\/li>\n
                                                                                            19. \n
                                                                                              A High Performance Hardware Architecture for the H.264\/AVC Half-Pixel Interpolation Unit<\/div>\n
                                                                                              Correa, M. M.; Schoenknecht, M. T.; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                              VI Southern Programmable Logic Conference \u00b7 2010 \u00b7 Porto de Galinhas, p. 81\u201386 DOI: 10.1109\/SPL.2010.5482998<\/a><\/span><\/div>\n<\/li>\n
                                                                                            20. \n
                                                                                              A Dedicated Hardware Solution for the H.264\/AVC Half-Pixel Interpolation Unit<\/div>\n
                                                                                              Correa, M. M.; Schoenknecht, M. T.; Agostini, L. V.<\/strong><\/div>\n
                                                                                              SIM 2010 – XXV Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2010 \u00b7 Porto Alegre <\/div>\n<\/li>\n<\/ol>\n

                                                                                              Livros publicados ou organizados (1)<\/span><\/h3>\n
                                                                                                \n
                                                                                              1. \n
                                                                                                XVI Workshop Iberchip<\/div>\n
                                                                                                Reis, Ricardo; Cardenas, C. S.; Agostini, L. V.<\/strong><\/div>\n
                                                                                                UFRGS \u00b7 Porto Alegre \u00b7 2010 \u00b7 ISBN 21771286 Acesso<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                \n2009 (25 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                \n

                                                                                                Artigos em peri\u00f3dicos (1)<\/span><\/h3>\n
                                                                                                  \n
                                                                                                1. \n
                                                                                                  A Comparative Analysis of Media Processing Component Implementations for the Brazilian Digital TV Middleware<\/div>\n
                                                                                                  Trojan, T.; Matos, J. C. B.; Agostini, L. V.<\/strong>; Goncalves, J. L.; Rosa Jr, L. S.<\/div>\n
                                                                                                  Revista Ci\u00eancia e Tecnologia \u00b7 2009 \u00b7 v. 12, p. 1\u20139 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                  Trabalhos em eventos (21)<\/span><\/h3>\n
                                                                                                    \n
                                                                                                  1. \n
                                                                                                    Transforms and Quantization Design Targeting the H.264\/AVC Intra Prediction Constraints<\/div>\n
                                                                                                    Dornelles, Robson; Sampaio, Felipe; Palomino, Daniel; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes \u00b7 2009 \u00b7 Natal, p. 81\u201386 DOI: 10.1145\/1601896.1601914<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  2. \n
                                                                                                    System C Modeling of an H.264\/AVC Intra Frame Video Encoder<\/div>\n
                                                                                                    Zatt, Bruno; Diniz, Cl\u00e1udio Machdo; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                    24\u00ba Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2009 \u00b7 Pelotas, p. 251\u2013254 <\/div>\n<\/li>\n
                                                                                                  3. \n
                                                                                                    Modelos Arquiteturais de Alto Desempenho para as Transformadas 4×4 Diretas e Inversas do Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                    Dornelles, Robson; Palomino, Daniel; Sampaio, Felipe; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    XV Workshop Iberchip \u00b7 2009 \u00b7 Buenos Aires, p. 195\u2013200 <\/div>\n<\/li>\n
                                                                                                  4. \n
                                                                                                    Low Latency and High Throughput Dedicated Loop of Transforms and Quantization Focusing in the H.264\/AVC Intra Prediction<\/div>\n
                                                                                                    Palomino, Daniel; Sampaio, Felipe; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    IEEE ICIP 2009 – IEEE International Conference on Image Processing \u00b7 2009 \u00b7 Cairo, p. 2697\u20132700 DOI: 10.1109\/ICIP.2009.5414106<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  5. \n
                                                                                                    Low Cost and Memoryless CAVLD Architecture for H.264\/AVC Decoder<\/div>\n
                                                                                                    Leal, Tha\u00edsa; Vortmann, Jo\u00e3o Alberto; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                    ISVLSI – IEEE Computer Society Annual Symposium on VLSI \u00b7 2009 \u00b7 Tampa, p. 280\u2013285 DOI: 10.1109\/ISVLSI.2009.20<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  6. \n
                                                                                                    Investiga\u00e7\u00e3o Algor\u00edtmica sobre a Estima\u00e7\u00e3o de Movimento na Compress\u00e3o de V\u00eddeo Digital: Uma An\u00e1lise Quantitativa<\/div>\n
                                                                                                    Rosa, Leandro Zanetti Paiva da; Porto, Marcelo Schiavon; Rediess, Fabiane Konrad; Susin, Altamiro; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    Workshop em Desempenho de Sistemas Computacionais e de Comunica\u00e7\u00e3o \u00b7 2009 \u00b7 Bento Gon\u00e7alves <\/div>\n<\/li>\n
                                                                                                  7. \n
                                                                                                    High throughput scalable Motion Compensation architecture for H.264\/SVC video coding standard<\/div>\n
                                                                                                    Silva, Tha\u00edsa Leal da; Zatt, Bruno; Susin, Altamiro; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    ICECS 2009 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2009 \u00b7 Yasmine Hammamet, p. 109\u2013112 DOI: 10.1109\/ICECS.2009.5410935<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  8. \n
                                                                                                    High Performance and Low Cost Architecture for H.264\/AVC CAVLD Targeting HDTV<\/div>\n
                                                                                                    Silva, Thaisa Leal da; Pereira, F.; Susin, Altamiro; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    SBCCI 2009 – 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes \u00b7 2009 \u00b7 Natal, p. 259\u2013263 DOI: 10.1145\/1601896.1601949<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  9. \n
                                                                                                    Hardware Design of the H.264\/AVC Variable Block Size Motion Estimation for Real-Time 1080HD Video Encoding<\/div>\n
                                                                                                    Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                    ISVLSI – IEEE Computer Society Annual Symposium on VLSI \u00b7 2009 \u00b7 Tampa, p. 115\u2013120 DOI: 10.1109\/ISVLSI.2009.11<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  10. \n
                                                                                                    H.264\/AVC Variable Block Size Motion Estimation for Real-Time 1080HD Video Encoding<\/div>\n
                                                                                                    Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                    24\u00ba Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2009 \u00b7 Pelotas, p. 215\u2013218 <\/div>\n<\/li>\n
                                                                                                  11. \n
                                                                                                    Filtro Redutor de Efeito de Bloco Entre Camadas do Padr\u00e3o H.264\/AVC Escal\u00e1vel<\/div>\n
                                                                                                    Corr\u00eaa, Guilherme Ribeiro; Agostini, L. V.<\/strong>; Cruz, Lu\u00eds Alberto<\/div>\n
                                                                                                    XV Workshop Iberchip \u00b7 2009 \u00b7 Buenos Aires, p. 561\u2013566 <\/div>\n<\/li>\n
                                                                                                  12. \n
                                                                                                    Efficient hardware design for the upsampling in the H.264\/SVC scalable video coding extension<\/div>\n
                                                                                                    Da Silva, Thaisa Leal; Susin, Altamiro Amadeu; Bampi, Sergio; Rediess, Fabiane Konrad; Agostini, Luciano Volcan<\/strong><\/div>\n
                                                                                                    2009 17th IFIP International Conference on Very Large Scale Integration (VLSISoC) \u00b7 2009 \u00b7 Florianopolis, p. 243\u20136 DOI: 10.1109\/VLSISOC.2009.6041366<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  13. \n
                                                                                                    Design of an interlayer deblocking filter architecture for H.264\/SVC based on a novel sample-level filtering order<\/div>\n
                                                                                                    Correa, Guilherme; Silva, Thaisa; Cruz, Luis A.; Agostini, Luciano<\/strong><\/div>\n
                                                                                                    2009 IEEE Workshop on Signal Processing Systems (SiPS) \u00b7 2009 \u00b7 Tampere, p. 102\u2013108 DOI: 10.1109\/SIPS.2009.5336233<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  14. \n
                                                                                                    Dedicated Architecture for the T\/Q\/IQ\/IT Loop Focusing the H.264\/AVC Intra Prediction<\/div>\n
                                                                                                    Sampaio, Felipe; Palomino, Daniel; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    24\u00ba Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2009 \u00b7 Pelotas, p. 223\u2013226 <\/div>\n<\/li>\n
                                                                                                  15. \n
                                                                                                    Arquitetura de Alto Desempenho para o Algoritmo de Estima\u00e7\u00e3o de Movimento SDS-DIC com M\u00faltiplos Quadros de Refer\u00eancia<\/div>\n
                                                                                                    Rosa, Leandro Zanetti Paiva da; Matos, D\u00e9bora; Porto, Marcelo Schiavon; Susin, Altamiro; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    XV Workshop Iberchip \u00b7 2009 \u00b7 Buenos Aires, p. 567\u2013572 <\/div>\n<\/li>\n
                                                                                                  16. \n
                                                                                                    Arquitetura de Alto Desempenho e Baixo Custo para o M\u00f3dulo de Quantiza\u00e7\u00e3o Direta do Padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo Digital<\/div>\n
                                                                                                    Sampaio, Felipe; Palomino, Daniel; Dornelles, Robson; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    XXXV CLEI – Confer\u00eancia Latino-Americana de Inform\u00e1tica \u00b7 2009 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                                  17. \n
                                                                                                    Arquitetura Dedicada para o Loop de Transformadas e Quantiza\u00e7\u00e3o para a Predi\u00e7\u00e3o Intra-Quadros do Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                    Sampaio, Felipe; Palomino, Daniel; Dornelles, Robson; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    XV Workshop Iberchip \u00b7 2009 \u00b7 Buenos Aires, p. 550\u2013555 <\/div>\n<\/li>\n
                                                                                                  18. \n
                                                                                                    A multitransform architecture for the H.264\/AVC standard and its design space exploration<\/div>\n
                                                                                                    Sampaio, Felipe; Dornelles, Robson; Palomino, Daniel; Siedler, G. S.; Correa, M.; Agostini, L. V.<\/strong><\/div>\n
                                                                                                    ICECS 2009 – IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2009 \u00b7 Yasmine Hammamet, p. 711\u2013714 DOI: 10.1109\/ICECS.2009.5410786<\/a><\/span><\/div>\n<\/li>\n
                                                                                                  19. \n
                                                                                                    A fast FPGA implementation of the inter-layer deblocking filter for H.264\/SVC<\/div>\n
                                                                                                    Corr\u00eaa, Guilherme Ribeiro; Agostini, L. V.<\/strong>; Cruz, Lu\u00eds Alberto<\/div>\n
                                                                                                    7th Conference on Telecommunication \u00b7 2009 \u00b7 Santa Maria da Feira <\/div>\n<\/li>\n
                                                                                                  20. \n
                                                                                                    A Real Time H.264\/AVC Main Profile Intra Frame Prediction Hardware Architecture for High Definition Video Coding<\/div>\n
                                                                                                    Diniz, Cl\u00e1udio Machdo; Zatt, Bruno; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                    24\u00ba Simp\u00f3sio Sul de Microeletr\u00f4nica \u00b7 2009 \u00b7 Pelotas, p. 227\u2013230 <\/div>\n<\/li>\n
                                                                                                  21. \n
                                                                                                    A Real Time H.264\/AVC Intra Frame Prediction Hardware Architecture for HDTV 1080P Videos<\/div>\n
                                                                                                    Diniz, Cl\u00e1udio Machdo; Zatt, Bruno; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                    2009 IEEE International Conference on Multimedia and Expo \u00b7 2009 \u00b7 New York, p. 1138\u20131141 DOI: 10.1109\/ICME.2009.5202700<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n

                                                                                                    Livros publicados ou organizados (1)<\/span><\/h3>\n
                                                                                                      \n
                                                                                                    1. \n
                                                                                                      XXIV South Symposium on Microelectronics<\/div>\n
                                                                                                      Brisolara, Lisane; Agostini, L. V.<\/strong>; Tavares, R.<\/div>\n
                                                                                                      UFPel \u00b7 Pelotas \u00b7 2009 \u00b7 ISBN 8576692341, 282 p\u00e1ginas <\/div>\n<\/li>\n<\/ol>\n

                                                                                                      Cap\u00edtulos de livros (2)<\/span><\/h3>\n
                                                                                                        \n
                                                                                                      1. \n
                                                                                                        Investiga\u00e7\u00e3o e Desenvolvimento de Hardware para as Transformadas do Padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                        Palomino, Daniel; Sampaio, Felipe; Correa, M.; Agostini, L. V.<\/strong><\/div>\n
                                                                                                        In: Desafios e Avan\u00e7os em Computa\u00e7\u00e3o: Inova\u00e7\u00f5es e Tecnologia \u00b7 2009 \u00b7 Editora e Gr\u00e1fica Universit\u00e1ria – PREC – UFPel, p. 115\u2013140, ISBN 9788571925298 <\/div>\n<\/li>\n
                                                                                                      2. \n
                                                                                                        Investiga\u00e7\u00e3o e Desenvolvimento de Algoritmos e Arquiteturas para a Estima\u00e7\u00e3o de Movimento em V\u00eddeos Digitais<\/div>\n
                                                                                                        Porto, Marcelo Schiavon; Porto, Roger Endrigo Carvalho; Dornelles, Robson; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                        In: Desafios e Avan\u00e7os em Computa\u00e7\u00e3o: Inova\u00e7\u00f5es e Tecnologia \u00b7 2009 \u00b7 Editora e Gr\u00e1fica Universit\u00e1ria – PREC – UFPel, p. 51\u2013113, ISBN 9788571925298 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                        \n2008 (19 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                        \n

                                                                                                        Trabalhos em eventos (19)<\/span><\/h3>\n
                                                                                                          \n
                                                                                                        1. \n
                                                                                                          Transient Fault-Tolerant Fast Adders Implemented in FPGAS<\/div>\n
                                                                                                          Corr\u00eaa, Guilherme Ribeiro; Franck, Helen; Mesquita, Eduardo; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                          SForum 2008 – VIII Microelectronics Students Forum \u00b7 2008 \u00b7 Gramado <\/div>\n<\/li>\n
                                                                                                        2. \n
                                                                                                          SystemC Modeling of an H.264\/AVC Intra Frame Encoder Architecture<\/div>\n
                                                                                                          Zatt, Bruno; Diniz, Cl\u00e1udio Machdo; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                          VLSI-SOC 2008 – 16TH IFIP International Conference on Very Large Scale Integration \u00b7 2008 \u00b7 Rhodes Island, p. 389\u2013394 <\/div>\n<\/li>\n
                                                                                                        3. \n
                                                                                                          Set-Tolerant Fast Adders Implemented in FPGAs<\/div>\n
                                                                                                          Corr\u00eaa, Guilherme Ribeiro; Franck, Helen; Mesquita, Eduardo; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                          SForum 2008 – Student Forum on Microelectronics \u00b7 2008 \u00b7 Gramado <\/div>\n<\/li>\n
                                                                                                        4. \n
                                                                                                          Sensitivity Analysis to SETs Considering Timing and Logic Masking<\/div>\n
                                                                                                          Braga, Matheus; Corr\u00eaa, Guilherme Ribeiro; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                          LATW2008 – 9th Latin-American Test Workshop \u00b7 2008 \u00b7 Puebla <\/div>\n<\/li>\n
                                                                                                        5. \n
                                                                                                          Implementation and Analysis of Architectures for the 4×4 2-D Forward Hadamard Transform of H.264\/AVC.<\/div>\n
                                                                                                          Palomino, Daniel; Corr\u00eaa, Guilherme Ribeiro; Dornelles, Robson; Sampaio, Felipe; Noble, Diego; Agostini, L. V.<\/strong><\/div>\n
                                                                                                          CLEI 2008 – XXXIV Conferencia Latinoamericana de Inform\u00e1tica \u00b7 2008 \u00b7 Santa Fe, p. 1139\u20131148 <\/div>\n<\/li>\n
                                                                                                        6. \n
                                                                                                          High Throughput Architecture for H.264\/AVC Motion Compensation Sample Interpolator for HDTV<\/div>\n
                                                                                                          Zatt, Bruno; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                          SBCCI2008 – 21st SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEM DESIGN \u00b7 2008 \u00b7 Gramado, p. 228\u2013232 DOI: 10.1145\/1404371.1404432<\/a><\/span><\/div>\n<\/li>\n
                                                                                                        7. \n
                                                                                                          HP422-MoCHA: A H.264\/AVC High Profile Motion Compensation Architecture for HDTV<\/div>\n
                                                                                                          Zatt, Bruno; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                          ISCAS2008 – 2008 IEEE International Symposium on Circuits and Systems \u00b7 2008 \u00b7 Seattle, p. 25\u201328 DOI: 10.1109\/iscas.2008.4541345<\/a><\/span><\/div>\n<\/li>\n
                                                                                                        8. \n
                                                                                                          Explora\u00e7\u00e3o da Multiprograma\u00e7\u00e3o Leve no Processo de Estima\u00e7\u00e3o de Movimento utilizando OpenMP<\/div>\n
                                                                                                          Vortmann, Jo\u00e3o Alberto; Petry, Rafael; Agostini, L. V.<\/strong>; Cavalheiro, G. G.<\/div>\n
                                                                                                          ERAD 2008 – VIII Escola Regional de Alto Desempenho \u00b7 2008 \u00b7 Santa Cruz do Sul, p. 229\u2013232 <\/div>\n<\/li>\n
                                                                                                        9. \n
                                                                                                          Evaluating Fault-Tolerant Fast Adders Implemented in FPGAs<\/div>\n
                                                                                                          Corr\u00eaa, Guilherme Ribeiro; Mesquita, Eduardo; Franck, Helen; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                          SPL2008 – IV Southern Conference on Programmable Logic \u00b7 2008 \u00b7 Bariloche, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                                        10. \n
                                                                                                          Estima\u00e7\u00e3o de Movimento com Multiprograma\u00e7\u00e3o Leve<\/div>\n
                                                                                                          Vortmann, Jo\u00e3o Alberto; Petry, Rafael; Corr\u00eaa, Guilherme Ribeiro; Rediess, Fabiane Konrad; Agostini, L. V.<\/strong>; Cavalheiro, G. G.<\/div>\n
                                                                                                          IX Workshop em Sistemas Computacionais de Alto Desempenho \u00b7 2008 \u00b7 Campo Grande <\/div>\n<\/li>\n
                                                                                                        11. \n
                                                                                                          Desenvolvimento de uma Arquitetura Paralela para a Hadamard 2-D 2×2 do Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                          Sampaio, Felipe; Fonseca, Carolina; Rediess, Fabiane Konrad; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                          Iberchip2008 – XIV Taller Iberchip 2008 \u00b7 2008 \u00b7 Puebla <\/div>\n<\/li>\n
                                                                                                        12. \n
                                                                                                          Arquitetura de Somador de Alto Desempenho Baseada no Rec\u00e1lculo Parcial com Carry Invertido.<\/div>\n
                                                                                                          Corr\u00eaa, Guilherme Ribeiro; Mesquita, Eduardo; Franck, Helen; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                          CLEI 2008 – XXXIV Conferencia Latinoamericana de Inform\u00e1tica \u00b7 2008 \u00b7 Santa Fe, p. 1139\u20131148 <\/div>\n<\/li>\n
                                                                                                        13. \n
                                                                                                          Arquitetura Dedicada \u00e0 Decodifica\u00e7\u00e3o dos N\u00edveis do CAVLC Definido no Padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                          Vortmann, Jo\u00e3o Alberto; Silva, Tha\u00edsa Leal da; Bampi, Sergio; Susin, Altamiro; Agostini, L. V.<\/strong><\/div>\n
                                                                                                          Iberchip2008 – XIV Taller Iberchip 2008 \u00b7 2008 \u00b7 Puebla <\/div>\n<\/li>\n
                                                                                                        14. \n
                                                                                                          Architectural Templates for the 4×4 Transforms Of the H.264\/AVC Standard Targeting the Intra Prediction Coder<\/div>\n
                                                                                                          Sampaio, Felipe; Dornelles, Robson; Palomino, Daniel; Corr\u00eaa, Guilherme Ribeiro; Noble, Diego; Agostini, L. V.<\/strong><\/div>\n
                                                                                                          SForum 2008 – VIII Microelectronics Students Forum \u00b7 2008 \u00b7 Gramado <\/div>\n<\/li>\n
                                                                                                        15. \n
                                                                                                          Architectural Templates for the 4X4 Transforms of the H.264\/AVC Standard targeting the Intra Prediction Coder<\/div>\n
                                                                                                          Sampaio, Felipe; Dornelles, Robson; Palomino, Daniel; Corr\u00eaa, Guilherme Ribeiro; Noble, Diego; Agostini, L. V.<\/strong><\/div>\n
                                                                                                          SForum 2008 – Student Forum on Microelectronics \u00b7 2008 \u00b7 Gramado <\/div>\n<\/li>\n
                                                                                                        16. \n
                                                                                                          Architectural Design for the New QSDS with Dynamic Iteration Control Motion Estimation Algorithm Targeting HDTV<\/div>\n
                                                                                                          Porto, Marcelo Schiavon; Agostini, L. V.<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                          SBCCI2008 – 21st SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEM DESIGN \u00b7 2008 \u00b7 Gramado, p. 216\u2013221 DOI: 10.1145\/1404371.1404430<\/a><\/span><\/div>\n<\/li>\n
                                                                                                        17. \n
                                                                                                          Architectural Design for Forward and Inverse Transforms of H.264\/AVC Standard Focusing in the Intra Frame Coder<\/div>\n
                                                                                                          Sampaio, Felipe; Rediess, Fabiane Konrad; Fonseca, Carolina; Agostini, L. V.<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                          VLSI-SOC 2008 – 16TH IFIP International Conference on Very Large Scale Integration \u00b7 2008 \u00b7 Rhodes Island <\/div>\n<\/li>\n
                                                                                                        18. \n
                                                                                                          Aplica\u00e7\u00e3o de T\u00e9cnicas de Processamento Paralelo no Algoritmo Full Search de Estima\u00e7\u00e3o de Movimento<\/div>\n
                                                                                                          Corr\u00eaa, Guilherme Ribeiro; Rediess, Fabiane Konrad; Agostini, L. V.<\/strong>; Cavalheiro, G. G.<\/div>\n
                                                                                                          ERAD 2008 – VIII Escola Regional de Alto Desempenho \u00b7 2008 \u00b7 Santa Cruz do Sul, p. 205\u2013208 <\/div>\n<\/li>\n
                                                                                                        19. \n
                                                                                                          A High Throughput and Low Cost Diamond Search Architecture for HDTV Motion Estimation<\/div>\n
                                                                                                          Porto, Marcelo Schiavon; Agostini, L. V.<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                          ICME2008 – IEEE International Conference on Multimedia & Expo \u00b7 2008 \u00b7 Hannover, p. 1033\u20131036 DOI: 10.1109\/ICME.2008.4607614<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                          \n2007 (22 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                          \n

                                                                                                          Artigos em peri\u00f3dicos (4)<\/span><\/h3>\n
                                                                                                            \n
                                                                                                          1. \n
                                                                                                            Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs<\/div>\n
                                                                                                            Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                            Microprocessors and Microsystems \u00b7 2007 \u00b7 v. 31, p. 487\u2013497 DOI: 10.1016\/j.micpro.2006.02.002<\/a><\/span><\/div>\n<\/li>\n
                                                                                                          2. \n
                                                                                                            Forward and Inverse 2-D DCT architectures targeting HDTV for H.264\/AVC video compression standard<\/div>\n
                                                                                                            Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho; Porto, Marcelo Schiavon; Silva, Tha\u00edsa Leal da; Rosa, Leandro Zanetti Paiva da; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                            Latin American Applied Research \u00b7 2007 \u00b7 v. 37, p. 11\u201316 <\/div>\n<\/li>\n
                                                                                                          3. \n
                                                                                                            Design and FPGA prototyping of a H.264\/AVC main profile decoder for HDTV<\/div>\n
                                                                                                            Agostini, Luciano V.<\/strong>; Azevedo Filho, Arnaldo P.; Staehler, Wagston T.; Rosa, Vagner S.; Zatt, Bruno; Pinto, Ana Cristina M.; Porto, Roger Endrigo; Bampi, Sergio; Susin, Altamiro A.<\/div>\n
                                                                                                            JOURNAL OF THE BRAZILIAN COMPUTER SOCIETY (ONLINE) \u00b7 2007 \u00b7 v. 13, p. 25\u201336 DOI: 10.1007\/bf03192399<\/a><\/span><\/div>\n<\/li>\n
                                                                                                          4. \n
                                                                                                            Avalia\u00e7\u00e3o Algor\u00edtmica para a Estima\u00e7\u00e3o de Movimento na Compress\u00e3o de V\u00eddeos Digitais<\/div>\n
                                                                                                            Rosa, Leandro Zanetti Paiva da; Porto, Marcelo Schiavon; Rediess, Fabiane Konrad; Petry, Rafael; Susin, Altamiro; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                            H\u00edfen (PUCRS. Impresso) \u00b7 2007 \u00b7 v. 31, p. 57\u201363 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                            Trabalhos em eventos (18)<\/span><\/h3>\n
                                                                                                              \n
                                                                                                            1. \n
                                                                                                              Soft Error Tolerant Carry-Select Adders Implemented into Altera FPGAS<\/div>\n
                                                                                                              Mesquita, Eduardo; Franck, Helen; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                              SPL2007 – III IEEE Southern Conference on Programmable Logic \u00b7 2007 \u00b7 Mar del Plata, p. 199\u2013202 DOI: 10.1109\/SPL.2007.371749<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            2. \n
                                                                                                              Reducing TMR Resource Overhead in Hardened Carry-Select Adders<\/div>\n
                                                                                                              Mesquita, Eduardo; Corr\u00eaa, Guilherme Ribeiro; Braga, Matheus; Franck, Helen; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                              LATW2007 – 8th IEEE Latin-American Test Workshop \u00b7 2007 \u00b7 Cuzco, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                                            3. \n
                                                                                                              RIC Fast Adder and Its Set-Tolerant Implementation in FPGAS<\/div>\n
                                                                                                              Mesquita, Eduardo; Franck, Helen; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                              FPL 2007 – 17th IEEE International Conference on Field Programmable Logic and Applications \u00b7 2007 \u00b7 Amsterdam, p. 638\u2013641 DOI: 10.1109\/FPL.2007.4380735<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            4. \n
                                                                                                              Preditor de Vetores de Movimento para o Padr\u00e3o H.264\/AVC Perfil Main<\/div>\n
                                                                                                              Zatt, Bruno; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                              XIII Taller IBERCHIP \u00b7 2007 \u00b7 Lima, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                                            5. \n
                                                                                                              Motion Compensation Hardware Accelerator Architecture for H.264\/AVC<\/div>\n
                                                                                                              Zatt, Bruno; Ferreira, Valter; Agostini, L. V.<\/strong>; Wagner, Fl\u00e1vio; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                              PSIVT2007 – IEEE Pacific Rim Symposium on Image Video and Technology 2007 \u00b7 2007 \u00b7 Santiago, Chile, p. 24\u201335 DOI: 10.1007\/978-3-540-77129-6_7<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            6. \n
                                                                                                              MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264\/AVC Decoder Targeting HDTV<\/div>\n
                                                                                                              Azevedo, Arnaldo; Zatt, Bruno; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                              ISCAS 2007 – IEEE International Symposium on Circuits and Systems \u00b7 2007 \u00b7 New Orleans, p. 1617\u20131620 DOI: 10.1109\/iscas.2007.378828<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            7. \n
                                                                                                              Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264\/AVC Decoder<\/div>\n
                                                                                                              Zatt, Bruno; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                              ISVLSI 2007 – IEEE Computer Society Annual Symposium on VLSI \u00b7 2007 \u00b7 Porto Alegre, p. 445\u2013446 DOI: 10.1109\/isvlsi.2007.64<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            8. \n
                                                                                                              Investigation of Motion Estimation Algorithms Targeting High Resolution Digital Video Compression<\/div>\n
                                                                                                              Porto, Marcelo Schiavon; Bampi, Sergio; Susin, Altamiro; Rosa, Leandro Zanetti Paiva da; Rediess, Fabiane Konrad; Petry, Rafael; Agostini, L. V.<\/strong><\/div>\n
                                                                                                              XIII Brazilian Symposium on Multimedia and the Web \u00b7 2007 \u00b7 Gramado, p. 111\u2013118 <\/div>\n<\/li>\n
                                                                                                            9. \n
                                                                                                              High Throughput Hardware Architecture for Motion Estimation with 4:1 Pel Subsampling Targeting Digital Television Applications<\/div>\n
                                                                                                              Porto, Marcelo Schiavon; Susin, Altamiro; Bampi, Sergio; Rosa, Leandro Zanetti Paiva da; Agostini, L. V.<\/strong><\/div>\n
                                                                                                              PSIVT2007 – IEEE Pacific Rim Symposium on Image Video and Technology 2007 \u00b7 2007 \u00b7 Santiago, Chile, p. 36\u201347 DOI: 10.1007\/978-3-540-77129-6_8<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            10. \n
                                                                                                              High Throughput Architecture for Forward Transforms Module of H.264\/AVC Video Coding Standard<\/div>\n
                                                                                                              Porto, Roger Endrigo Carvalho; Porto, Marcelo Schiavon; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                              ICECS2007 – 14th IEEE International Conference on Electronics, Circuits and Systems \u00b7 2007 \u00b7 Marrakech, p. 445\u2013446 DOI: 10.1109\/icecs.2007.4510952<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            11. \n
                                                                                                              H.264\/AVC HDTV Motion Compensation Soft IP<\/div>\n
                                                                                                              Zatt, Bruno; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                              IPSoC2007 – IP Based Eletronic System – Conference & Exhibition \u00b7 2007 \u00b7 Grenoble <\/div>\n<\/li>\n
                                                                                                            12. \n
                                                                                                              FPGA Prototyping Strategy for a H.264\/AVC Video Decoder<\/div>\n
                                                                                                              Rosa, Vagner; Staehler, W.; Azevedo, Arnaldo; Zatt, Bruno; Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                              RSP 2007 – 18TH IEEE International Workshop on Rapid System Prototyping \u00b7 2007 \u00b7 Porto Alegre, p. 174\u2013180 DOI: 10.1109\/rsp.2007.23<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            13. \n
                                                                                                              FPGA Based Design of CAVLC and Exp-Golomb Coders for H.264\/AVC Baseline Entropy Coding<\/div>\n
                                                                                                              Silva, Tha\u00edsa Leal da; Vortman, Jo\u00e3o Alberto; Agostini, L. V.<\/strong>; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                              SPL2007 – III IEEE Southern Conference on Programmable Logic \u00b7 2007 \u00b7 Mar del Plata, p. 161\u2013166 DOI: 10.1109\/SPL.2007.371741<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            14. \n
                                                                                                              Desenvolvimento de Hardware para a Compensa\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC com Foco na Compress\u00e3o de V\u00eddeo do Sistema Brasileiro de Televis\u00e3o Digital.<\/div>\n
                                                                                                              Rediess, Fabiane Konrad; Rosa, Leandro Zanetti Paiva da; Petry, Rafael; Agostini, L. V.<\/strong><\/div>\n
                                                                                                              CIC 2007 – XVI Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2007 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                                            15. \n
                                                                                                              Desenvolvimento Arquitetural para a Compensa\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                              Rediess, Fabiane Konrad; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                              XIII Taller IBERCHIP \u00b7 2007 \u00b7 Lima, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                                            16. \n
                                                                                                              Arquitetura Completamente Paralela para o Bloco das Transformadas Diretas do Padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                              Porto, Roger Endrigo Carvalho; Porto, Marcelo Schiavon; Kastensmidt, F.; Lubaszewski, M.; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                              XIII Taller IBERCHIP \u00b7 2007 \u00b7 Lima, p. 1\u20136 <\/div>\n<\/li>\n
                                                                                                            17. \n
                                                                                                              A Pipelined 8×8 2-D Forward DCT Hardware Architecture for H.264\/AVC High Profile Encoder<\/div>\n
                                                                                                              Silva, Tha\u00edsa Leal da; Diniz, Cl\u00e1udio Machdo; Vortmann, Jo\u00e3o Alberto; Agostini, L. V.<\/strong>; Susin, Altamiro; Bampi, Sergio<\/div>\n
                                                                                                              PSIVT 2007 – Pacific-Rim Symposium on Image and Video Technology \u00b7 2007 \u00b7 Santiago, Chile, p. 5\u201315 DOI: 10.1007\/978-3-540-77129-6_8<\/a><\/span><\/div>\n<\/li>\n
                                                                                                            18. \n
                                                                                                              A Motion Compensation Architecture Design and Prototyping Targeting SDTV Frames for H.264\/AVC Standard<\/div>\n
                                                                                                              Rediess, Fabiane Konrad; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                              SPL2007 – III IEEE Southern Conference on Programmable Logic – Designer Forum \u00b7 2007 \u00b7 Mar del Plata, p. 37\u201340 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                              \n2006 (24 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                              \n

                                                                                                              Artigos em peri\u00f3dicos (2)<\/span><\/h3>\n
                                                                                                                \n
                                                                                                              1. \n
                                                                                                                Projeto de Hardware para a Compensa\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                                Rediess, Fabiane Konrad; Silva, Andre Marcelo Coelho da; Vortman, Jo\u00e3o Alberto; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                H\u00edfen (PUCRS. Impresso) \u00b7 2006 \u00b7 v. 30, p. 57\u201364 <\/div>\n<\/li>\n
                                                                                                              2. \n
                                                                                                                Codificador de Entropia Segundo o Perfil Baseline do padr\u00e3o H.264\/AVC de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                                Vortman, Jo\u00e3o Alberto; Silva, Tha\u00edsa Leal da; Rediess, Fabiane Konrad; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                H\u00edfen (PUCRS. Impresso) \u00b7 2006 \u00b7 v. 30, p. 49\u201356 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                                Trabalhos em eventos (22)<\/span><\/h3>\n
                                                                                                                  \n
                                                                                                                1. \n
                                                                                                                  Valida\u00e7\u00e3o de uma Arquitetura para Compensa\u00e7\u00e3o de Movimento Segundo o Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                                  Zatt, Bruno; Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 83\u201386 <\/div>\n<\/li>\n
                                                                                                                2. \n
                                                                                                                  Safe Path-Based Hierarchical Functional Timing Analysis by Considering Block Arrival Times<\/div>\n
                                                                                                                  Ferr\u00e3o, Daniel; Wilke, Gustavo; Reis, Ricardo; Neves, Carolina Gomes; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                                  ICCDCS 2006 – VI International Caribbean Conference on Devices, Circuits and Systems \u00b7 2006 \u00b7 Playa del Carmen, p. 345\u2013349 DOI: 10.1109\/ICCDCS.2006.250885<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                3. \n
                                                                                                                  Quantiza\u00e7\u00e3o Direta e Inversa de Alta Performance para a Compress\u00e3o de V\u00eddeo H.264\/AVC Direcionada para HDTV<\/div>\n
                                                                                                                  Porto, Marcelo Schiavon; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 95\u201398 <\/div>\n<\/li>\n
                                                                                                                4. \n
                                                                                                                  Projeto de Arquiteturas S\u00edncronas e de Alto Desempenho para os Blocos das Transformadas Diretas e Inversas da Compress\u00e3o H.264\/AVC<\/div>\n
                                                                                                                  Rosa, Leandro Zanetti Paiva da; Silva, Tha\u00edsa Leal da; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 87\u201390 <\/div>\n<\/li>\n
                                                                                                                5. \n
                                                                                                                  Motion Compensation Decoder Architecture for H.264\/AVC Main Profile Targeting HDTV<\/div>\n
                                                                                                                  Azevedo, Arnaldo; Zatt, Bruno; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                  VLSI-SOC 2006 – 14TH IFIP International Conference on Very Large Scale Integration \u00b7 2006 \u00b7 Nice, p. 52\u201357 DOI: 10.1109\/vlsisoc.2006.313203<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                6. \n
                                                                                                                  Investiga\u00e7\u00e3o de Algor\u00edtmos e Proposta Arquitetural para a Estima\u00e7\u00e3o de Movimento Direcionada \u00e0 V\u00eddeos de Alta Resolu\u00e7\u00e3o<\/div>\n
                                                                                                                  Porto, Marcelo Schiavon; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 61\u201364 <\/div>\n<\/li>\n
                                                                                                                7. \n
                                                                                                                  Investiga\u00e7\u00e3o de Algoritmos e Desenvolvimento Arquitetural para a Estima\u00e7\u00e3o de Movimento em Compress\u00e3o de V\u00eddeo Digital<\/div>\n
                                                                                                                  Porto, Marcelo Schiavon; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                  CLEI 2006 – XXXII Conferencia Latinoamericana de Inform\u00e1tica \u00b7 2006 \u00b7 Santiago do Chile <\/div>\n<\/li>\n
                                                                                                                8. \n
                                                                                                                  High Throughput Multitransform and Multiparallelism IP for the H.264\/AVC Video Compression Standard<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                  ISCAS 2006 – IEEE International Symposium on Circuits and Systems \u00b7 2006 \u00b7 Ilha de Kos, p. 5417\u20135422 DOI: 10.1109\/iscas.2006.1693859<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                9. \n
                                                                                                                  High Throughput FPGA Based Architecture for H.264\/AVC Inverse Transforms and Quantization<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Porto, Marcelo Schiavon; G\u00fcntzel, Jos\u00e9 Luis; Porto, Roger Endrigo Carvalho; Bampi, Sergio<\/div>\n
                                                                                                                  MWSCAS 2006 – 49th IEEE International Midwest Symposium on Circuits and Systems \u00b7 2006 \u00b7 San Jose, p. 281\u2013285 DOI: 10.1109\/mwscas.2006.382052<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                10. \n
                                                                                                                  High Throughput Architecture of JPEG Compressor for Color Images Targeting FPGAs<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Bampi, Sergio; Silva, Ivan Saraiva<\/div>\n
                                                                                                                  ICECS 2006 – 11th IEEE International Conference on Electronics, Circuits, and Systems \u00b7 2006 \u00b7 Nice DOI: 10.1109\/icecs.2006.379749<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                11. \n
                                                                                                                  High Throughput Architecture for H.264\/AVC Forward Transforms Block<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho; Bampi, Sergio; Rosa, Leandro Zanetti Paiva da; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva<\/div>\n
                                                                                                                  GLSVLSI 2006 – 16th ACM Great Lake Symposium on VLSI \u00b7 2006 \u00b7 Philadelphia, p. 320\u2013323 DOI: 10.1145\/1127908.1127982<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                12. \n
                                                                                                                  Forward and Inverse 2-D DCT Architectures for H.264\/AVC Video Compression Directed to HDTV<\/div>\n
                                                                                                                  Porto, Roger Endrigo Carvalho; Porto, Marcelo Schiavon; Silva, Tha\u00edsa Leal da; Rosa, Leandro Zanetti Paiva da; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Silva, Ivan Saraiva; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  SPL2006 – II IEEE Southern Conference on Programmable Logic \u00b7 2006 \u00b7 Mar del Plata <\/div>\n<\/li>\n
                                                                                                                13. \n
                                                                                                                  FPGA Design of a H.264\/AVC Main Profile Decoder for HDTV<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Azevedo, Arnaldo; Rosa, Vagner; Berriel, Eduardo; Santos, Tatiana Gadelha dos; Bampi, Sergio; Susin, Altamiro<\/div>\n
                                                                                                                  FPL 2006 – 16th IEEE International Conference on Field Programmable Logic and Applications \u00b7 2006 \u00b7 Madri, p. 501\u2013506 DOI: 10.1109\/fpl.2006.311258<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                14. \n
                                                                                                                  FPGA Based Architectures for H.264\/AVC Video Compression Standard<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                  FPL 2006 – 16th IEEE International Conference on Field Programmable Logic and Applications \u00b7 2006 \u00b7 Madrid, p. 957\u2013958 <\/div>\n<\/li>\n
                                                                                                                15. \n
                                                                                                                  Explora\u00e7\u00e3o no Espa\u00e7o de Projeto da Hadamard 4×4 Direta do Padr\u00e3o de Compress\u00e3o de V\u00eddeo H.264\/AVC<\/div>\n
                                                                                                                  Silva, Andre Marcelo Coelho da; Silva, Tha\u00edsa Leal da; Porto, Marcelo Schiavon; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 99\u2013102 <\/div>\n<\/li>\n
                                                                                                                16. \n
                                                                                                                  Entropy Coder Architectures for H.264\/AVC Baseline Profile<\/div>\n
                                                                                                                  Silva, Tha\u00edsa Leal da; Vortman, Jo\u00e3o Alberto; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  SForum 2006 – Student Forum on Microelectronics \u00b7 2006 \u00b7 Ouro Preto <\/div>\n<\/li>\n
                                                                                                                17. \n
                                                                                                                  Desenvolvimento de Hardware para a Compensa\u00e7\u00e3o de Movimento do Padr\u00e3o H.264\/AVC com Foco na Compress\u00e3o de V\u00eddeo do Sistema Brasileiro de Televis\u00e3o Digital<\/div>\n
                                                                                                                  Rediess, Fabiane Konrad; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XV Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2006 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                                                18. \n
                                                                                                                  Dedicated Hardware Architectures for H.264\/AVC Exp-Golomb Coding and Decoding<\/div>\n
                                                                                                                  Vortman, Jo\u00e3o Alberto; Silva, Tha\u00edsa Leal da; G\u00fcntzel, Jos\u00e9 Luis; Bampi, Sergio; Silva, Ivan Saraiva; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  SIM2006 – XXI South Symposium on Microeletronics \u00b7 2006 \u00b7 Porto Alegre, p. 129\u2013132 <\/div>\n<\/li>\n
                                                                                                                19. \n
                                                                                                                  Avalia\u00e7\u00e3o dos Impactos do Uso de Somadores como Macro Functions em um Projeto de Compressor JPEG<\/div>\n
                                                                                                                  Camaratta, Giovano; Daitx, F\u00e1bio; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9 <\/div>\n<\/li>\n
                                                                                                                20. \n
                                                                                                                  Arquitetura de Hardware Dedicada para a Decodifica\u00e7\u00e3o Exp-Golomb do Padr\u00e3o H.264 de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                                  Silva, Tha\u00edsa Leal da; Vortman, Jo\u00e3o Alberto; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 277\u2013278 <\/div>\n<\/li>\n
                                                                                                                21. \n
                                                                                                                  Arquitetura Multi-Transformada de Alto Desempenho com Paralelismo Program\u00e1vel e Direcionada para o Padr\u00e3o de Compress\u00e3o de V\u00eddeo H.264\/AVC<\/div>\n
                                                                                                                  Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                  XII Workshop IBERCHIP \u00b7 2006 \u00b7 San Jos\u00e9, p. 91\u201394 <\/div>\n<\/li>\n
                                                                                                                22. \n
                                                                                                                  An\u00e1lise Autom\u00e1tica da Propaga\u00e7\u00e3o de Single-Event Transients em Circuitos Combinacionais Implementados em FPGAs<\/div>\n
                                                                                                                  Corr\u00eaa, Guilherme Ribeiro; Braga, Matheus; Agostini, L. V.<\/strong>; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                                  XV Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2006 \u00b7 Pelotas <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                  \n2005 (15 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                  \n

                                                                                                                  Artigos em peri\u00f3dicos (2)<\/span><\/h3>\n
                                                                                                                    \n
                                                                                                                  1. \n
                                                                                                                    Comparison between OCP, PVCI and BVCI Hardware Reuse Interfaces Designed in VHDL and Mapped to FPGAs<\/div>\n
                                                                                                                    Silva, Thaisa Leal da; Porto, Marcelo Schiavon; Porto, Roger Endrigo Carvalho; Rosa, Leandro Zanetti Paiva da; Silva, Ivan Saraiva; Bampi, Sergio; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                    H\u00edfen (PUCRS. Impresso) \u00b7 2005 \u00b7 v. 29, n. 55\/56, p. 119\u2013128 <\/div>\n<\/li>\n
                                                                                                                  2. \n
                                                                                                                    Arquiteturas de C\u00e1lculo da FDCT 2-D e da IDCT 2-D para Codecs HDTV no Padr\u00e3o H.264\/AVC<\/div>\n
                                                                                                                    Porto, Marcelo Schiavon; Rosa, Leandro Zanetti Paiva da; Silva, Thaisa Leal da; Porto, Roger Endrigo Carvalho; Silva, Ivan Saraiva; Bampi, Sergio; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                    H\u00edfen (PUCRS. Impresso) \u00b7 2005 \u00b7 v. 29, n. 55\/56, p. 129\u2013138 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                                    Trabalhos em eventos (13)<\/span><\/h3>\n
                                                                                                                      \n
                                                                                                                    1. \n
                                                                                                                      Soft and Hard IP Design of a Multiplierless and Fully Pipelined 2-D DCT<\/div>\n
                                                                                                                      Agostini, L. V.<\/strong>; Silva, Sandro Vilela da; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                      VLSI-SOC 2005 – 13TH IFIP International Conference on Very Large Scale Integration \u00b7 2005 \u00b7 Perth, p. 300\u2013305 <\/div>\n<\/li>\n
                                                                                                                    2. \n
                                                                                                                      Projeto, S\u00edntese e Simula\u00e7\u00e3o das Interfaces de Reuso de Hardware do Padr\u00e3o OCP (Open Core Protocol)<\/div>\n
                                                                                                                      Porto, Marcelo Schiavon; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XI Workshop IBERCHIP \u00b7 2005 \u00b7 Salvador, p. 251\u2013254 <\/div>\n<\/li>\n
                                                                                                                    3. \n
                                                                                                                      Motion Compensation Sample Processing for HDTV H.264\/AVC Decoder<\/div>\n
                                                                                                                      Azevedo, Arnaldo; Zatt, Bruno; Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                      23rd NORCHIP Conference \u00b7 2005 \u00b7 Oulu, p. 110\u2013113 DOI: 10.1109\/NORCHP.2005.1597001<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                    4. \n
                                                                                                                      Increasing the Image Quality in a JPEG Compressor through Arithmetic Error Minimization<\/div>\n
                                                                                                                      Porto, Roger Endrigo Carvalho; Neves, Bruno Silveira; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XI Workshop IBERCHIP \u00b7 2005 \u00b7 Salvador, p. 90\u201393 <\/div>\n<\/li>\n
                                                                                                                    5. \n
                                                                                                                      Impactos do uso de Diferentes Arquiteturas de Somadores em FPGAS Altera<\/div>\n
                                                                                                                      Porto, Marcelo Schiavon; Silva, Andre Marcelo Coelho da; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XI Workshop IBERCHIP \u00b7 2005 \u00b7 Salvador, p. 134\u2013137 <\/div>\n<\/li>\n
                                                                                                                    6. \n
                                                                                                                      Hierarchical Timing Analysis Using Selective Critical Path Sensitization<\/div>\n
                                                                                                                      Neves, Carolina Gomes; Braga, Matheus; Ferr\u00e3o, Daniel; Agostini, L. V.<\/strong>; Reis, Ricardo; G\u00fcntzel, Jos\u00e9 Luis<\/div>\n
                                                                                                                      LATW2005 – 5th IEEE Latin-American Test Workshop \u00b7 2005 \u00b7 Salvador, p. 65\u201370 <\/div>\n<\/li>\n
                                                                                                                    7. \n
                                                                                                                      Hardware para o Compensador de Movimento do Padr\u00e3o H.264 de Compress\u00e3o de V\u00eddeo<\/div>\n
                                                                                                                      Silva, Andre Marcelo Coelho da; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XIV Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2005 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                                                    8. \n
                                                                                                                      Explora\u00e7\u00e3o do Espa\u00e7o de Projeto em Arquiteturas para C\u00e1lculo da Raiz Quadrada Inteira<\/div>\n
                                                                                                                      Silva, Tha\u00edsa Leal da; Mateus, Gustavo Pereira; Berardi, Rita Cristina; Sawabe, \u00c9rico; Blasco, Ezequiel; G\u00fcntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XI Workshop IBERCHIP \u00b7 2005 \u00b7 Salvador, p. 158\u2013161 <\/div>\n<\/li>\n
                                                                                                                    9. \n
                                                                                                                      Design and Comparison between PVCI, BVCI and OCP Hardware Reuse Interfaces Mapped to FPGA<\/div>\n
                                                                                                                      Porto, Marcelo Schiavon; Silva, Thaisa Leal da; Porto, Roger Endrigo Carvalho; G\u00fcntzel, Jos\u00e9 Luis; Silva, Ivan Saraiva; Bampi, Sergio; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      SForum 2005 – Student Forum on Microelectronics \u00b7 2005 \u00b7 Florian\u00f3polis <\/div>\n<\/li>\n
                                                                                                                    10. \n
                                                                                                                      Design Space Exploration on the H.264 4×4 Hadamard Transform<\/div>\n
                                                                                                                      Porto, Marcelo Schiavon; Silva, Thaisa Leal da; Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                      23rd NORCHIP Conference \u00b7 2005 \u00b7 Oulu, p. 188\u2013191 DOI: 10.1109\/NORCHP.2005.1597021<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                    11. \n
                                                                                                                      Desenvolvimento e Valida\u00e7\u00e3o das Interfaces BVCI para o Reuso de Blocos de Hardware<\/div>\n
                                                                                                                      Silva, Thaisa Leal da; Porto, Roger Endrigo Carvalho; Guntzel, Jos\u00e9 Luis; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                      XI Workshop IBERCHIP \u00b7 2005 \u00b7 Salvador, p. 239\u2013242 <\/div>\n<\/li>\n
                                                                                                                    12. \n
                                                                                                                      Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units<\/div>\n
                                                                                                                      Azevedo, Arnaldo; Agostini, L. V.<\/strong>; Wagner, Fl\u00e1vio; Bampi, Sergio; Soares, Rodrigo; Silva, Ivan Saraiva<\/div>\n
                                                                                                                      RSP 2005 – 16TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING \u00b7 2005 \u00b7 Montreal, p. 255\u2013257 DOI: 10.1109\/rsp.2005.10<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                    13. \n
                                                                                                                      A FPGA Based Design of a Multiplierless and Fully Pipelined JPEG Compressor<\/div>\n
                                                                                                                      Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho; Bampi, Sergio; Silva, Ivan Saraiva<\/div>\n
                                                                                                                      DSD 2005 – 8th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN \u00b7 2005 \u00b7 Porto, p. 210\u2013213 DOI: 10.1109\/DSD.2005.6<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                      \n2004 (8 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                      \n

                                                                                                                      Artigos em peri\u00f3dicos (2)<\/span><\/h3>\n
                                                                                                                        \n
                                                                                                                      1. \n
                                                                                                                        Parallel color space converters for JPEG image compression<\/div>\n
                                                                                                                        Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                        Microelectronics and Reliability \u00b7 2004 \u00b7 v. 44, n. 4, p. 697\u2013703 DOI: 10.1016\/j.microrel.2003.10.016<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                      2. \n
                                                                                                                        DomoWork: Ambiente para Projeto de Sistemas de Automa\u00e7\u00e3o Predial\\Residencial Orientado a Objetos<\/div>\n
                                                                                                                        Ungethuem, Natan Bueno; Ara\u00fajo, Jair Jonko; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                        H\u00edfen (PUCRS. Impresso) \u00b7 2004 \u00b7 v. 28, n. 54, p. 59\u201364 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                                        Trabalhos em eventos (6)<\/span><\/h3>\n
                                                                                                                          \n
                                                                                                                        1. \n
                                                                                                                          Project Space Exploration on the 2-D DCT Architecture of a JPEG Compressor Directed to FPGA Implementation<\/div>\n
                                                                                                                          Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho<\/div>\n
                                                                                                                          DATE 2004 – Design, Automation & Test in Europe \u00b7 2004 \u00b7 Paris, p. 224\u2013229 DOI: 10.1109\/DATE.2004.1269234<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                        2. \n
                                                                                                                          Experimentos com o Padr\u00e3o de Reuso de Hardware OCP (Open Core Protocol)<\/div>\n
                                                                                                                          Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                          X Workshop IBERCHIP \u00b7 2004 \u00b7 Cartagena de \u00cdndias <\/div>\n<\/li>\n
                                                                                                                        3. \n
                                                                                                                          Experimentos com a Interface de Reuso PVCI em uma DCT 2-D Direcionada para a Compress\u00e3o JPEG<\/div>\n
                                                                                                                          Silva, Thaisa Leal da; Porto, Roger Endrigo Carvalho; Tavares, Rodrigo Ara\u00fajo; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                          X Workshop IBERCHIP \u00b7 2004 \u00b7 Cartagena de Indias <\/div>\n<\/li>\n
                                                                                                                        4. \n
                                                                                                                          Experimentos com a Interface BVCI e com Projetos de Sistemas em Chip Baseados no Reuso de Hardware<\/div>\n
                                                                                                                          Silva, Thaisa Leal da; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                          X Workshop IBERCHIP \u00b7 2004 \u00b7 Cartagena de Indias <\/div>\n<\/li>\n
                                                                                                                        5. \n
                                                                                                                          Experimentos com Somadores R\u00e1pidos para Uso na DCT 2-D<\/div>\n
                                                                                                                          Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                          X Workshop IBERCHIP \u00b7 2004 \u00b7 Cartegena de Indias <\/div>\n<\/li>\n
                                                                                                                        6. \n
                                                                                                                          Descri\u00e7\u00e3o e Valida\u00e7\u00e3o das Interfaces de Reuso do Padr\u00e3o OCP (Open Core Protocol) Utilizando VHDL<\/div>\n
                                                                                                                          Porto, Marcelo Schiavon; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                          XIII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2004 \u00b7 Pelotas <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                          \n2003 (6 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                          \n

                                                                                                                          Artigos em peri\u00f3dicos (1)<\/span><\/h3>\n
                                                                                                                            \n
                                                                                                                          1. \n
                                                                                                                            Explora\u00e7\u00e3o do Espa\u00e7o de Projeto da DCT 2-D de um Compressor de Imagens JPEG<\/div>\n
                                                                                                                            Agostini, L. V.<\/strong>; Porto, Roger Endrigo Carvalho<\/div>\n
                                                                                                                            H\u00edfen (PUCRS. Impresso) \u00b7 2003 \u00b7 v. 27, n. 52, p. 171\u2013176 <\/div>\n<\/li>\n<\/ol>\n

                                                                                                                            Trabalhos em eventos (4)<\/span><\/h3>\n
                                                                                                                              \n
                                                                                                                            1. \n
                                                                                                                              Experimentos com a Interface PVCI para Reuso de Blocos de Hardware<\/div>\n
                                                                                                                              Porto, Roger Endrigo Carvalho; Tavares, Rodrigo Ara\u00fajo; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                              XII Congresso de Inicia\u00e7\u00e3o Cient\u00edfica da UFPel \u00b7 2003 \u00b7 Pelotas <\/div>\n<\/li>\n
                                                                                                                            2. \n
                                                                                                                              Error Minimization of 2-D DCT and Quantization Operations for a Gray Scale Images JPEG Compressor<\/div>\n
                                                                                                                              Neves, Bruno Silveira; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                              III Student Forum on Microelectronics \u00b7 2003 \u00b7 S\u00e3o Paulo <\/div>\n<\/li>\n
                                                                                                                            3. \n
                                                                                                                              Design of Adder Architectures for JPEG Compression<\/div>\n
                                                                                                                              Porto, Roger Endrigo Carvalho; Agostini, L. V.<\/strong><\/div>\n
                                                                                                                              III Student Forum on Microelectronics \u00b7 2003 \u00b7 S\u00e3o Paulo <\/div>\n<\/li>\n
                                                                                                                            4. \n
                                                                                                                              Conversor de Espa\u00e7o de Cores Paralelo para a Compress\u00e3o de Imagens JPEG<\/div>\n
                                                                                                                              Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                              IX Workshop IBERCHIP \u00b7 2003 \u00b7 Havana <\/div>\n<\/li>\n<\/ol>\n

                                                                                                                              Livros publicados ou organizados (1)<\/span><\/h3>\n
                                                                                                                                \n
                                                                                                                              1. \n
                                                                                                                                XVIII South Simposium on Microelectronics<\/div>\n
                                                                                                                                Agostini, L. V.<\/strong>; Cappelatti, Ewerton Artur<\/div>\n
                                                                                                                                Editora da FEEVALE \u00b7 Novo Hamburgo \u00b7 2003 \u00b7 ISBN 85866613, 243 p\u00e1ginas <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                                \n2002 (2 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                                \n

                                                                                                                                Trabalhos em eventos (2)<\/span><\/h3>\n
                                                                                                                                  \n
                                                                                                                                1. \n
                                                                                                                                  Projeto de Arquitetura de Codificador de Entropia para Compress\u00e3o JPEG de Imagens em Tons de Cinza<\/div>\n
                                                                                                                                  Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                                  VIII Workshop IBERCHIP \u00b7 2002 \u00b7 Guadalajara <\/div>\n<\/li>\n
                                                                                                                                2. \n
                                                                                                                                  Pipelined Entropy Coders for JPEG Compression<\/div>\n
                                                                                                                                  Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                                  SBCCI2002 – XIV SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEM DESIGN \u00b7 2002 \u00b7 Porto Alegre, p. 203\u2013208 DOI: 10.1109\/sbcci.2002.1137659<\/a><\/span><\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                                  \n2001 (6 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                                  \n

                                                                                                                                  Trabalhos em eventos (6)<\/span><\/h3>\n
                                                                                                                                    \n
                                                                                                                                  1. \n
                                                                                                                                    Projeto de uma Arquitetura de DCT 1D para a Compress\u00e3o de Imagens JPEG<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                                    VII WORKSHOP IBERCHIP \u00b7 2001 \u00b7 Montevid\u00e9o <\/div>\n<\/li>\n
                                                                                                                                  2. \n
                                                                                                                                    Pipelined Fast 2-D DCT Architecture for JPEG Image Compression<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Silva, Ivan Saraiva; Bampi, Sergio<\/div>\n
                                                                                                                                    SBCCI 2001 – XIV Symposium on Integrated Circuits and Systems Design \u00b7 2001 \u00b7 Piren\u00f3polis, p. 226\u2013231 DOI: 10.1109\/SBCCI.2001.953032<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                                  3. \n
                                                                                                                                    Integrated Digital Architecture for JPEG Image Compression<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                                    ECCTD 2001 – European Conference on Circuit Theory and Design \u00b7 2001 \u00b7 Espoo, p. 181\u2013184 <\/div>\n<\/li>\n
                                                                                                                                  4. \n
                                                                                                                                    Caipirinha: A Free Graphical Viewer for Berkeley Spice<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Prado, A. R.<\/div>\n
                                                                                                                                    I Student Forum on Microelectronics \u00b7 2001 \u00b7 Piren\u00f3polis – GO, p. 5\u20138 <\/div>\n<\/li>\n
                                                                                                                                  5. \n
                                                                                                                                    Arquitetura Integrada para Conversor de Espa\u00e7o de Cores e Downsampler para a Compress\u00e3o de Imagens JPEG<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Bampi, Sergio<\/div>\n
                                                                                                                                    VII WORKSHOP IBERCHIP \u00b7 2001 \u00b7 Montevid\u00e9o <\/div>\n<\/li>\n
                                                                                                                                  6. \n
                                                                                                                                    A Dedicated 20 x 3 bit Multiplier Using the Recoding Principle for Echo Cancellation<\/div>\n
                                                                                                                                    Agostini, L. V.<\/strong>; Stemmer, G. H.; Bampi, Sergio; Reis, Ricardo<\/div>\n
                                                                                                                                    DATE 2001 – Design, Automation & Test in Europe – Designer\u00b4s Forum \u00b7 2001 \u00b7 Munich, p. 73\u201376 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n
                                                                                                                                    \n2000 (6 publica\u00e7\u00f5es)<\/span><\/summary>\n
                                                                                                                                    \n

                                                                                                                                    Trabalhos em eventos (6)<\/span><\/h3>\n
                                                                                                                                      \n
                                                                                                                                    1. \n
                                                                                                                                      Using Reconfigurability Features to Break Down Test Costs: a Case Study<\/div>\n
                                                                                                                                      Carro, L.; Agostini, L. V.<\/strong>; Pacheco, R. V.; Lubaszewski, M.<\/div>\n
                                                                                                                                      LATW2000 – 1st IEEE Latin-American Test Workshop \u00b7 2000 \u00b7 Rio de Janeiro, p. 209\u2013214 <\/div>\n<\/li>\n
                                                                                                                                    2. \n
                                                                                                                                      SisECO: Design of an Echo-Canceling IC for Base Band Modems<\/div>\n
                                                                                                                                      Agostini, L. V.<\/strong>; Stemmer, G. H.; Prado, A. R.; Pacheco, R. V.; Campos, T. J.; Bampi, Sergio; Reis, Ricardo<\/div>\n
                                                                                                                                      SBCCI2000 – XIII SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEM DESIGN \u00b7 2000 \u00b7 Manaus – AM, p. 216\u2013221 DOI: 10.1109\/sbcci.2000.876033<\/a><\/span><\/div>\n<\/li>\n
                                                                                                                                    3. \n
                                                                                                                                      Projeto de um Circuito Cancelador de Eco – SisECO<\/div>\n
                                                                                                                                      Prado, A. R.; Stemmer, G. H.; Agostini, L. V.<\/strong>; Pacheco, R. V.; Reis, Ricardo; Bampi, Sergio<\/div>\n
                                                                                                                                      VI Workshop IBERCHIP \u00b7 2000 \u00b7 S\u00e3o Paulo, p. 307\u2013316 <\/div>\n<\/li>\n
                                                                                                                                    4. \n
                                                                                                                                      Modeling and Simulation of a Heterogeneous Embedded System<\/div>\n
                                                                                                                                      Stemmer, G. H.; Agostini, L. V.<\/strong>; Campos, T. J.; Suzim, A.; Carro, L.<\/div>\n
                                                                                                                                      SBMicro 2000 – XV International Conference on Microelectronics and Packaging \u00b7 2000 \u00b7 Manaus – AM, p. 238\u2013243 <\/div>\n<\/li>\n
                                                                                                                                    5. \n
                                                                                                                                      Implementa\u00e7\u00e3o de Filtros Adaptativos para Cancelamento de Eco<\/div>\n
                                                                                                                                      Agostini, L. V.<\/strong>; Stemmer, G. H.; Campos, T. J.; Suzim, A.; Carro, L.<\/div>\n
                                                                                                                                      VI Workshop IBERCHIP \u00b7 2000 \u00b7 S\u00e3o Paulo, p. 551\u2013559 <\/div>\n<\/li>\n
                                                                                                                                    6. \n
                                                                                                                                      Estudo de Cores a partir da Arquitetura Parte Operativa 2901<\/div>\n
                                                                                                                                      Bertasi, D.; Zimmermann, F. O.; Agostini, L. V.<\/strong>; Pacheco, R. V.; Suzim, A.; Carro, L.<\/div>\n
                                                                                                                                      VI Workshop IBERCHIP \u00b7 2000 \u00b7 S\u00e3o Paulo, p. 563\u2013572 <\/div>\n<\/li>\n<\/ol>\n<\/div>\n<\/details>\n<\/section>\n
                                                                                                                                      Para confer\u00eancia e informa\u00e7\u00f5es adicionais, consulte o Curr\u00edculo Lattes<\/a>.<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

                                                                                                                                      Publica\u00e7\u00f5es Produ\u00e7\u00e3o bibliogr\u00e1fica organizada por ano e, dentro de cada ano, por tipo de publica\u00e7\u00e3o. Os t\u00edtulos s\u00e3o apresentados em sua forma oficial, e o nome de Luciano Volcan Agostini aparece em destaque nas listas de autores. 112Artigos em peri\u00f3dicos … Continue lendo →<\/span><\/a><\/p>\n","protected":false},"author":685,"featured_media":0,"parent":0,"menu_order":2,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-26","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/users\/685"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/comments?post=26"}],"version-history":[{"count":3,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26\/revisions"}],"predecessor-version":[{"id":474,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/26\/revisions\/474"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/media?parent=26"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}