{"id":125,"date":"2016-08-23T11:36:32","date_gmt":"2016-08-23T14:36:32","guid":{"rendered":"https:\/\/wp.ufpel.edu.br\/agostini\/?page_id=125"},"modified":"2024-05-09T10:40:00","modified_gmt":"2024-05-09T13:40:00","slug":"funded-projects","status":"publish","type":"page","link":"https:\/\/wp.ufpel.edu.br\/agostini\/funded-projects\/","title":{"rendered":"Funded Projects"},"content":{"rendered":"<p style=\"text-align: right;\"><em>*** Updated on May 6, 2024 ***<\/em><\/p>\n<p>Here are the research projects I coordinated or participated in the team, which received funding (completed or ongoing):<\/p>\n<p><strong>COORDINATED PROJECTS:<\/strong><\/p>\n<ul>\n<li><strong>Project:<\/strong> Efficient Solutions for VVC and AV1 Video Codecs Using Dedicated Hardware and Machine Learning<br \/>\n<strong>Funding Source:<\/strong> PQ CNPq Grant 2022 (progression to level 1C)<br \/>\n<strong>Status:<\/strong> Ongoing<\/li>\n<li><strong>Project:<\/strong> Efficient Hardware Design for State-of-the-Art Visual Signal Encoding: VVC, AV1, and Light-Fields<br \/>\n<strong>Funding Source:<\/strong> Universal CNPq 2021<br \/>\n<strong>Status:<\/strong> Ongoing<\/li>\n<li><strong>Project:<\/strong> Machine Learning and Dedicated Hardware for Efficient VVC and AV1 Video Encoder Solutions<br \/>\n<strong>Funding Source:<\/strong> PqG FAPERGS 2021<br \/>\n<strong>Status:<\/strong> Ongoing<\/li>\n<li><strong>Project:<\/strong> Utilizing Machine Learning for Computational Complexity Reduction in the New Versatile Video Coding Standard &#8211; Part II<br \/>\n<strong>Funding Source:<\/strong> AI TCC CNPq 2022<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Utilizing Machine Learning for Computational Complexity Reduction in the New Versatile Video Coding Standard<br \/>\n<strong>Funding Source:<\/strong> AI TCC CNPq 2021<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Architectures and Algorithms for Three-Dimensional Image and Video Coding<br \/>\n<strong>Funding Source:<\/strong> PQ CNPq Grant 2018 (progression to level 1D)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Low-Power Hardware Design for Video Coding Using Approximate Computing<br \/>\n<strong>Funding Source:<\/strong> Universal CNPq 2018<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Collaboration between PPGC-UFPel and the University of Lisbon in Research on High-Performance Video Coding with Massive Parallelism on GPUs and Approximate Computing<br \/>\n<strong>Funding Source:<\/strong> Internationalization FAPERGS 2018<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> High-Performance Video Coding with Massive Parallelism on GPUs and Approximate Computing<br \/>\n<strong>Funding Source:<\/strong> CAPES-FCT 2018 (collaboration with the University of Lisbon) <strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Algorithmic Optimizations and Hardware Design for Video Codecs Compatible with the HEVC Standard<br \/>\n<strong>Funding Source:<\/strong> CAPES Senior Internship Abroad 2016<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Efficient Algorithms for Video Encoding in Adaptive Embedded Systems<\/li>\n<li><strong>Funding Source: <\/strong>PRONEM FAPERGS 2014 (network between UFPel, UFRGS, and UFSM)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Heuristics, Algorithmic Optimizations, and Architectural Designs for the HEVC Standard of Digital Video Coding: Integrated Solutions in the Development of Dedicated Hardware for Mobile Applications and Embedded Systems in General<br \/>\n<strong>Funding Source: <\/strong> PqG FAPERGS 2013<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Algorithmic Optimizations and Hardware Design for Video CODECs Compatible with the HEVC Standard<br \/>\n<strong>Funding Source: <\/strong> PQ CNPq Grant 2015 (renewing level 2 grant)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Heuristics, Algorithmic Optimizations, and Architectural Designs for the HEVC Standard of Digital Video Coding: Integrated Solutions in the Development of Dedicated Hardware for Mobile Applications and Embedded Systems in General<br \/>\n<strong>Funding Source: <\/strong> Universal CNPq 2013<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Algorithms and Architectures for 3D Video Encoders Compatible with the HEVC\/H.265 Standard<br \/>\n<strong>Funding Source: <\/strong> CAPES-FCT 2013 (cooperation with University of Coimbra)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Study and Development of Techniques for Reduction and Dynamic Control of Computational Complexity of High-Efficiency Video Encoders<br \/>\n<strong>Funding Source: <\/strong> BJT CAPES 2014<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Hardware and Software for Digital Video Compression According to the Emerging HEVC Standard<br \/>\n<strong>Funding Source: <\/strong> PQ CNPq Grant 2011 (level 2)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Implementation of Efficient Solutions for Middleware Ginga Modules of the Brazilian Digital TV System and Development of Embedded Applications for Case Studies<br \/>\n<strong>Funding Source: <\/strong>PqG FAPERGS 2010<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Research and Development of Hardware and Software for Scalable Video Compression with Focus on the Brazilian Digital TV System<br \/>\n<strong>Funding Source: <\/strong> Universal-CNPq 2009<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Research and Development of Hardware for Scalable Video Compression with Focus on the Brazilian Digital TV System<br \/>\n<strong>Funding Source: <\/strong> ARD FAPERGS 2009<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Architectural Designs for Image and Video Compression Using Hardware Reuse Methodologies<br \/>\n<strong>Funding Source: <\/strong> PROADE3 FAPERGS 2006<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<\/ul>\n<p><strong>COLLABORATIVE PROJECTS:<\/strong><\/p>\n<ul>\n<li><strong>Project:<\/strong> Development of Solutions for High-Definition Video Compression on Mobile Devices<br \/>\n<strong>Funding Source: <\/strong> ARD\/PPP FAPERGS 2014<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> VideoArch3D \u2013 Efficient Power Techniques for 3-dimensional Multimedia Systems<br \/>\n<strong>Funding Source: <\/strong> PROBAL CAPES 2009 (cooperation with Germany &#8211; UFRGS, UFPel, and KIT)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> SisChip: Design and Synthesis of Chip Systems<br \/>\n<strong>Funding Source: <\/strong> PRONEX CNPq 2009 (network project coordinated by UFRGS)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Chip System for the Access Terminal of the Brazilian Digital Television System<br \/>\n<strong>Funding Source: <\/strong>CTIC\/RNP\/FINEP 2009 (network project coordinated by UFRGS)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> GingaCDN: Ginga Code Development Network<br \/>\n<strong>Funding Source: <\/strong> FINEP CTIC\/RNP\/FINEP 2009 (network project coordinated by UFPB)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<li><strong>Project:<\/strong> Consortium for Postgraduate Human Resources Training for Digital TV &#8211; Source Signal Coding and Integrated Circuit Design, Hardware, and Firmware Design for SBTVD<br \/>\n<strong>Funding Source: <\/strong>RHTVD CAPES 2007 (network project coordinated by UFRGS)<br \/>\n<strong>Status:<\/strong> Completed<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>*** Updated on May 6, 2024 *** Here are the research projects I coordinated or participated in the team, which received funding (completed or ongoing): COORDINATED PROJECTS: Project: Efficient Solutions for VVC and AV1 Video Codecs Using Dedicated Hardware and &hellip; <a href=\"https:\/\/wp.ufpel.edu.br\/agostini\/funded-projects\/\">Continue lendo <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":685,"featured_media":0,"parent":0,"menu_order":5,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_crdt_document":"","footnotes":""},"class_list":["post-125","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/125","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/users\/685"}],"replies":[{"embeddable":true,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/comments?post=125"}],"version-history":[{"count":6,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/125\/revisions"}],"predecessor-version":[{"id":379,"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/pages\/125\/revisions\/379"}],"wp:attachment":[{"href":"https:\/\/wp.ufpel.edu.br\/agostini\/wp-json\/wp\/v2\/media?parent=125"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}